2. The BYTE pin in the 48-pin TSOPI package must be tied to V
CC
to use the device as a 1 M × 16 SRAM. The 48-TSOPI package can also be used as a 2 M × 8
SRAM by tying the BYTE signal to V
SS
. In the 2 M × 8 configuration, pin 45 is A20, while BHE, BLE and I/O
8
to I/O
14
pins are not used.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
Document Number: 001-15607 Rev. *D
Page 3 of 17
CY62167E MoBL
®
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................ –65 °C to +150 °C
Ambient temperature with
power applied .......................................... –55 °C to +125 °C
Supply voltage to ground
potential .........................................................–0.5 V to 6.0 V
DC voltage applied to outputs
in high Z state
[4, 5]
..........................................–0.5 V to 6.0 V
DC input voltage
[4, 5]
......................................–0.5 V to 6.0 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(MIL-STD-883, method 3015) ................................. >2001 V
Latch-up current ..................................................... >200 mA
Operating Range
Device
CY62167ELL
Range
Industrial
Ambient
Temperature
V
CC
[6]
–40 °C to +85 °C 4.5 V to 5.5 V
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH voltage
Test Conditions
V
CC
= 4.5 V
V
CC
= 5.5 V
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
Output leakage current
V
CC
operating supply current
I
OL
= 2.1 mA
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
GND < V
I
< V
CC
GND < V
O
< V
CC
, output disabled
f = f
MAX
= 1/t
RC
f = 1 MHz
I
SB2[10]
Automatic power down
current—CMOS inputs
V
CC
= V
CC(max)
I
OUT
= 0 mA
CMOS levels
I
OH
= –1.0 mA
I
OH
= –0.1 mA
45 ns
Min
2.4
–
–
2.2
–0.5
–1
–1
–
–
–
Typ
[7]
–
–
–
–
–
–
–
25
2.2
1.5
Max
–
3.4
[8]
0.4
V
CC
+ 0.5 V
0.7
[9]
+1
+1
30
4.0
12
V
V
V
µA
µA
mA
mA
µA
Unit
V
CE
1
> V
CC
– 0.2 V or CE
2
< 0.2 V, or
BHE and BLE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
= V
CC
(max)
Notes
4. V
IL
(min) = –2.0 V for pulse durations less than 20 ns.
5. V
IH
(max) = V
CC
+ 0.75 V for pulse durations less than 20 ns.
6. Full Device AC operation is based on a 100 µs ramp time from 0 to V
CC
(min) and 200 µs wait time after V
CC
stabilization.
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC
(typ), T
A
= 25 °C.
8. Please note that the maximum VOH limit doesnot exceed minimum CMOS VIH of 3.5 V. If you are interfacing this SRAM with 5 V legacy processors that require a
minimum VIH of 3.5V, please refer to Application Note
AN6081
for technical details and options you may consider.
9. Under DC conditions the device meets a V
IL
of 0.8 V. However, in dynamic conditions input LOW voltage applied to the device must not be higher than 0.7 V.
10. Chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE need to be tied to CMOS levels to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Document Number: 001-15607 Rev. *D
Page 4 of 17
CY62167E MoBL
®
Capacitance
Parameter
[11]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[11]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit
board
48-pin TSOP I Unit
60
4.3
C/W
C/W
AC Test Loads and Waveforms
Figure 1. AC Test Loads and Waveforms
V
CC
OUTPUT
R1
V
CC
GND
10%
R2
ALL INPUT PULSES
90%
90%
10%
FALL TIME= 1 V/ns
30 pF
INCLUDING
JIG AND
SCOPE
RISE TIME= 1 V/ns
EQUIVALENT TO: THÉVENIN EQUIVALENT
R
TH
OUTPUT
V
Parameters
R1
R2
R
TH
V
TH
Values
1800
990
639
1.77
Unit
V
Note
11. Tested initially and after any design or process changes that may affect these parameters.
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