电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

CY62157ESL_13

产品描述8-Mbit (512 K x 16) Static RAM
文件大小300KB,共17页
制造商Cypress(赛普拉斯)
下载文档 全文预览

CY62157ESL_13概述

8-Mbit (512 K x 16) Static RAM

文档预览

下载PDF文档
CY62157ESL MoBL
®
8-Mbit (512 K × 16) Static RAM
8-Mbit (512 K × 16) Static RAM
Features
Very high speed: 45 ns
Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V
Ultra low standby power
Typical Standby current: 2
A
Maximum Standby current: 8
A
Ultra low active power
Typical active current: 1.8 mA at f = 1 MHz
Easy memory expansion with CE and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in Pb-free 44-pin thin small outline package (TSOP) II
package
addresses are not toggling. Place the device into standby mode
when deselected (CE HIGH or both BHE and BLE are HIGH).
The input or output pins (I/O
0
through I/O
15
) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), both the Byte High Enable and
the Byte Low Enable are disabled (BHE, BLE HIGH), or during
an active write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
0
through I/O
7
) is written into the location
specified on the address pins (A
0
through A
18
). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O
8
through
I/O
15
) is written into the location specified on the address pins
(A
0
through A
18
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O
0
to I/O
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O
8
to I/O
15
. See the
Truth Table on page 11
for a
complete description of read and write modes.
The CY62157ESL device is suitable for interfacing with
processors that have TTL I/P levels. It is not suitable for
processors that require CMOS I/P levels. Please see
Electrical
Characteristics on page 4
for more details and suggested
alternatives.
Functional Description
The CY62157ESL is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life (MoBL
®
) in portable
applications. The device also has an automatic power down
feature that significantly reduces power consumption when
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
512 K × 16
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
Power Down
Circuit
CE
BHE
WE
CE
OE
BLE
A
11
A
12
A
13
A
15
BLE
A
14
A
16
A
17
A
18
BHE
Cypress Semiconductor Corporation
Document Number: 001-43141 Rev. *E
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised June 4, 2013

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1017  939  1862  894  319  22  27  51  10  30 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved