TSM4835
30V P-Channel Enhancement Mode MOSFET
Pin assignment:
1. Source 8. Drain
2. Source 7. Drain
3. Source 6. Drain
4. Gate
5. Drain
V
DS
= - 30V
R
DS (on)
, Vgs @ - 10V, Ids @ - 9.5A =18mΩ
R
DS (on)
, Vgs @ - 4.5V, Ids @ - 7.5A =30mΩ
Features
Advanced trench process technology
High density cell design for ultra low on-resistance
High gate voltage
Block Diagram
Ordering Information
Part No.
TSM4835CS
Packing
Tape & Reel
Package
SOP-8
Absolute Maximum Rating
(Ta = 25
o
C
unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current, V
GS
@4.5V.
Pulsed Drain Current, V
GS
@4.5V
Maximum Power Dissipation
Ta = 25 C
Ta > 25
o
C
Operating Junction Temperature
Operating Junction and Storage Temperature Range
T
J
T
J
, T
STG
o
Symbol
V
DS
V
GS
I
D
I
DM
P
D
Limit
- 30
± 25
- 9.5
- 50
2.5
1.6
+150
- 55 to +150
Unit
V
V
A
A
W
W
o
o
C
C
Thermal Performance
Parameter
Junction to Ambient Thermal Resistance (PCB mounted)
Note: Surface mounted on FR4 board t<=5sec.
Symbol
R
θja
Limit
50
Unit
o
C/W
TSM4835
1-5
2003/12 rev. A
Electrical Characteristics
Ta = 25 C, unless otherwise noted
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
o
Static
Drain-Source Breakdown Voltage
Drain-Source On-State Resistance
Drain-Source On-State Resistance
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage
Forward Transconductance
V
GS
= 0V, I
D
= - 250uA
V
GS
= - 10V, I
D
= -9.5A
V
GS
= - 4.5V, I
D
= -7.5A
V
DS
= V
GS
, I
D
= - 250uA
V
DS
= - 30V, V
GS
= 0V
V
GS
= ± 25V, V
DS
= 0V
V
DS
= - 15V, I
D
= - 8A
V
DS
= - 15V, I
D
= - 4.6A,
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Source-Drain Diode
Max. Diode Forward Current
Diode Forward Voltage
I
S
= - 2.1A, V
GS
= 0V
I
S
V
SD
--
--
--
- 0.77
- 2.1
- 1.2
A
V
V
DS
= - 15V, V
GS
= 0V,
f = 1.0MHz
V
DD
= - 15V, R
L
= 15Ω,
I
D
= - 1A, V
GEN
= - 10V,
R
G
= 6Ω
V
GS
= - 5V
V
DS
= - 15V, I
D
= - 4.6A,
V
GS
= - 10V
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Q
g
--
--
--
--
--
--
--
--
--
--
54
8.5
10.3
24
12
78
37
2520
490
330
60
--
--
30
30
120
80
--
--
--
pF
nS
BV
DSS
R
DS(ON)
R
DS(ON)
V
GS(TH)
I
DSS
I
GSS
g
fs
- 30
--
--
-1
--
--
--
--
--
13
22
--
--
--
22
23
--
18
30
-3
- 1.0
± 100
--
34
nC
V
uA
nA
S
V
mΩ
Dynamic
Note : pulse test: pulse width <=300uS, duty cycle <=2%
TSM4835
2-5
2003/12 rev. A
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