SN74LS640, SN74LS641,
SN74LS642, SN74LS645
Octal Bus Transceivers
These octal bus transceivers are designed for asynchronous
two-way communication between data buses. Control function
implementation minimizes external timing requirements. These
circuits allow data transmission from the A bus to B or from the B bus
to A bus depending upon the logic level of the direction control (DIR)
input. Enable input (G) can disable the device so that the buses are
effectively isolated.
DEVICE
LS640
LS641
LS642
LS645
OUTPUT
3-State
Open-Collector
Open-Collector
3-State
LOGIC
Inverting
True
Inverting
True
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LOW
POWER
SCHOTTKY
MARKING
DIAGRAMS
SN74LS64xN
AWLYYWW
FUNCTION TABLE
CONTROL
INPUTS
G
L
L
H
DIR
L
H
X
OPERATION
LS640
LS642
B data to A bus
A data to B bus
Isolation
LS641
LS645
B data to A bus
A data to B bus
Isolation
20
1
1
PDIP−20
N SUFFIX
CASE 738
H = HIGH Level, L = LOW Level, X = Irrelevant
20
1
1
LS64y
AWLYYWW
GUARANTEED OPERATING RANGES
(SN74LS640, SN74LS645)
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current
−
High
Min
4.75
0
Typ
5.0
25
Max
5.25
70
−3.0
−15
Output Current
−
Low
24
Unit
V
°C
mA
mA
mA
SOIC−20
DW SUFFIX
CASE 751D
20
1
74LS64y
AWLYWW
1
1
GUARANTEED OPERATING RANGES
(SN74LS641, SN74LS642)
Symbol
V
CC
T
A
V
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Voltage
−
High
Output Current
−
Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
5.5
24
Unit
V
°C
V
mA
SOEIAJ−20
M SUFFIX
CASE 967
x
= 0, 1, 2, or 5
y
= 0, 1, or 2
A
= Assembly Location
WL = Wafer Lot
Y, YY= Year
WW = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
July, 2006
−
Rev. 11
1
Publication Order Number:
SN74LS640/D
SN74LS640, SN74LS641, SN74LS642, SN74LS645
CONNECTION DIAGRAMS DIP (TOP VIEW)
V
CC
ENABLE
B1
G
20 19 18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
12
B8
11
ENABLE
V
CC
G
B1
20 19 18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
12
B8
11
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
Figure 1. SN74LS640
SN74LS642
Figure 2. SN74LS641
SN74LS645
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2
SN74LS640, SN74LS641, SN74LS642, SN74LS645
SN74LS640
•
SN74LS645
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
V
OH
V
OL
I
OZH
I
OZL
I
IH
I
IL
I
OS
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
2.4
2.0
0.25
0.35
0.4
0.5
20
−400
20
0.1
0.1
−0.4
−40
−225
70
90
−0.65
3.4
Min
2.0
0.6
−1.5
Typ
Max
Unit
V
V
V
V
V
V
V
μA
μA
μA
mA
mA
mA
mA
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
=
−
18 mA
V
CC
= MIN, I
OH
= 3.0 mA
V
CC
= MIN, I
OH
= MAX
I
OL
= 12 mA
I
OL
= 24 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
Output LOW Voltage
Output Off Current HIGH
Output Off Current LOW
A or B, DIR or G
Input HIGH Current
Input LOW Current
Output Short Circuit Current (Note 1)
Power Supply Current
Total Output HIGH
Total, Output LOW
DIR or G
A or B
V
CC
= MAX, V
OUT
= 2.7 V
V
CC
= MAX, V
OUT
= 0.4 V
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 5.5 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX
I
CC
mA
V
CC
= MAX
95
Total at HIGH Z
1. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V)
Limits
LS640
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZL
t
PZH
t
PZL
t
PZH
t
PLZ
t
PHZ
t
PLZ
t
PHZ
Parameter
Propagation Delay
A to B
Propagation Delay
B to A
Output Enable Time
G, DIR to A
Output Enable Time
G, DIR to B
Output Disable Time
G, DIR to A
Output Disable Time
G, DIR to B
Min
Typ
6.0
8.0
6.0
8.0
31
23
31
23
15
15
15
15
Max
10
15
10
15
40
40
40
40
25
25
25
25
Min
LS645
Typ
8.0
11
8.0
11
31
26
31
26
15
15
15
15
Max
15
15
15
15
40
40
40
40
25
25
25
25
Unit
ns
ns
ns
ns
ns
C
L
= 5.0 pF
ns
Test Conditions
C
L
= 45 pF,
R
L
= 667
Ω
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3
SN74LS640, SN74LS641, SN74LS642, SN74LS645
SN74LS641
•
SN74LS642
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
I
OH
V
OL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Current
Output LOW Voltage
0.25
0.35
−0.65
Min
2.0
0.6
−1.5
100
0.4
0.5
20
−0.1
−0.4
70
90
95
mA
V
CC
= MAX
Typ
Max
Unit
V
V
V
μA
V
V
μA
mA
mA
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
=
−
18 mA
V
CC
= MIN, V
OH
= MAX
I
OL
= 12 mA
I
OL
= 24 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
I
IH
I
IL
Input HIGH Current
Input LOW Current
Power Supply Current
Total, Output HIGH
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
I
CC
Total, Output LOW
Total at HIGH Z
AC CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V)
Limits
LS641
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay,
A to B
Propagation Delay,
B to A
Propagation Delay,
G, DIR to A
Propagation Delay,
G, DIR to B
Min
Typ
17
16
17
16
23
34
25
37
Max
25
25
25
25
40
50
40
50
Min
LS642
Typ
19
14
19
14
26
43
28
39
Max
25
25
25
25
40
60
40
60
Unit
ns
ns
ns
ns
Test Conditions
C
L
= 45 pF,
R
L
= 667
Ω
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4
SN74LS640, SN74LS641, SN74LS642, SN74LS645
DEVICE ORDERING INFORMATION
Device Order Number
SN74LS640N
SN74LS640DW
SN74LS640DWR2
SN74LS640M
SN74LS640MEL
SN74LS641N
SN74LS641DW
SN74LS641DWR2
SN74LS641M
SN74LS641MEL
SN74LS642N
SN74LS642DW
SN74LS642DWR2
SN74LS642M
SN74LS642MEL
SN74LS645N
Package Type
PDIP−20
SOIC−WIDE
SOIC−WIDE
SOEIAJ−20
SOEIAJ−20
PDIP−20
SOIC−WIDE
SOIC−WIDE
SOEIAJ−20
SOEIAJ−20
PDIP−20
SOIC−WIDE
SOIC−WIDE
SOEIAJ−20
SOEIAJ−20
PDIP−20
Tape and Reel Size
1440 Units/Box
2500/Tape and Reel
2500/Tape and Reel
See Note 2
See Note 2
1440 Units/Box
2500/Tape and Reel
2500/Tape and Reel
See Note 2
See Note 2
1440 Units/Box
2500/Tape and Reel
2500/Tape and Reel
See Note 2
See Note 2
1440 Units/Box
2. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative.
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5
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