MGA-632P8
Low Noise, High Linearity Active Bias Low Noise Amplifier
Data Sheet
Description
Avago Technologies’ MGA-632P8 is an economical, easy-
to-use GaAs MMIC Low Noise Amplifier (LNA) with active
bias. The LNA has low noise with excellent input return
loss and high linearity achieved through the use of
Avago Technologies’ proprietary 0.5um GaAs Enhance-
ment-mode pHEMT process. The LNA has an extra feature
that allows a designer to adjust supply current and gain
externally. Due to the high isolation between the input
and output, gain can be adjusted independently through
a resistor in series with a blocking capacitor from the
output pin to FB1 pin, without affecting the noise figure.
It is housed in a miniature 2.0 x 2.0 x 0.75mm
3
8-pin Thin
Small Leadless Package (TSLP) package. The compact
footprint and low profile coupled with low noise, high
gain, excellent input return loss and high linearity make
the MGA-632P8 an ideal choice as an LNA for cellular in-
frastructure for GSM, CDMA, W-CDMA and TD-SCDMA ap-
plications.
It is designed for optimum use between 1.4GHz to
3.8GHz. For optimum performance at lower frequency
from 400MHz to 1.5GHz, the MGA-631P8 is recommend-
ed. Both MGA-631P8 and MGA-632P8 share the same
package and pinout.
Features
•
Low noise figure
•
Good input return loss
•
High linearity performance
•
High Isolation
•
Externally adjustable supply current, 40-80mA
•
Externally adjustable gain, 15-20dB
•
GaAs E-pHEMT Technology
[1]
•
Low cost small package size: 2.0x2.0x0.75 mm
3
•
Excellent uniformity in product specifications
Specifications
1.95GHz; 4V, 57mA (typ)
•
17.6 dB Gain
•
0.62 dB Noise Figure
•
-22.7 dB S11
•
-40.5 dB S12
•
33.9 dBm Output IP3
•
19.2 dBm Output Power at 1dB gain compression
Pin Configuration and Package Marking
2.0 x 2.0 x 0.75 mm
3
8-lead TSLP
Applications
•
Low noise amplifier for cellular infrastructure for GSM,
CDMA, W-CDMA and TD-SCDMA.
•
Other ultra low noise applications.
Note:
1. Enhancement mode technology employs positive Vbias, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Top View
Note:
Package marking provides
orientation and identification
“G2” is Device Code
“X” is month code
Bottom View
Note:
Pin 1 : not used
Pin 2 : RFin
Pin 3 : RF ground
Pin 4 : Vbias
Pin 5 : FB1
Pin 6 : not used
Pin 7 : RFout
Pin 8 : Gnd
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 50 V
ESD Human Body Model = 200 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
MGA-632P8 Absolute Maximum Rating
[1]
Symbol
Vd
P
in,max
(ON)
P
in,max
(OFF)
P
diss
T
j
T
STG
Parameter
Device Supply Voltage
CW RF Input Power
(Vd = 4.0V, Vbias=4.0V)
CW RF Input Power
(Vd=4.0V, Vbias=0V)
Total Power Dissipation
[2]
Junction Temperature
Storage Temperature
Units
V
dBm
dBm
W
°C
°C
Absolute Max.
5.5
20
25
0.55
150
-65 to 150
Thermal Resistance
[3]
(Vd = 4.0V, Vbias=4.0V), θ
jc
= 47
°C/W
Notes:
1. Operation of this device in excess of any of these limits may cause permanent damage.
2. Board temperature T
B
is 25 °C. Derate 21.2mW/ °C for T
B
>124 °C.
3. Thermal resistance measured using Infra-Red Microscopy Technique.
Product Consistency Distribution Charts
[4]
240
200
Frequency
160
120
80
40
0
16
16.5
17
17.5
18
Gain (dB)
18.5
19
Process Capability for Gain
LSL = 16.0
Nominal = 17.65
USL = 19.0
CPK Lower = 2.78
CPK Upper = 2.47
Std Dev = 0.19
240
200
160
Frequency
120
80
40
0
Process Capability for NF
Nominal = 0.62
USL = 1.0
CPK = 5.06
Std Dev = 0.025
0.3
0.4
0.5
0.6 0.7
NF (dB)
0.8
0.9
1
Figure 1. Gain distribution at 57mA
Process Capability for Vbias
LSL = 44
Nominal = 57
USL = 70
CPK Lower = 2.60
CPK Upper = 2.62
Std Dev = 1.22
Figure 2. NF distribution at 57mA
500
400
Count
300
200
100
30000
Frequency
20000
10000
Nominal = 33.9
LSL = 31.3
Std Dev = 0.546
CPK = 1.553
45
50
55
60
Id (mA)
65
70
31
32
33
34
OIP3U
35
36
37
Figure 3. Id distribution at 57mA
Figure4. OIP3U distribution at 57mA.
Note:
4. Distribution data sample size is 500 samples taken from 3 different wafer lots. Future wafer allocated to this product may have nominal values
anywhere between the upper and lower limits. Circuit losses have been de-embedded from actual measurements.
2
Electrical Specifications
[1, 2]
T
A
= 25 °C, Vd =4V @ 57mA, R1=300ohm unless otherwise specified.
Symbol
Id
Gain
Parameter and Test Condition
Operational Current
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Freq=1.75 GHz
Freq=1.85 GHz
Freq=1.95 GHz
Vbias=4.0V
Associated Gain
Units
mA
dB
Min.
44
Typ.
57
18.3
17.9
17.6
34.7
34.3
33.9
0.59
0.59
0.62
18.8
19.2
19.2
-32.1
-27.6
-22.7
-12.2
-13.6
-13.9
-40.2
-40.4
-40.5
Max.
70
16.0
Output Third Order Intercept Point
(2-tone @ F
RF
+/- 2.5MHz, Pin = -20dBm)
Noise Figure in 50Ω system
dBm
31.3
dB
19.0
OIP3
NF
50Ω
1.0
OP1dB
Output Power at 1dB Gain Compression
dBm
IRL
Input Return Loss
dB
ORL
Output Return Loss
dB
S12
Reverse Isolation
dB
Notes:
1. Measurements obtained using demo board described in Figure 31 and Table 1, List 1. Input and output board losses have been de-embedded.
2. Guaranteed specifications are 100% tested in production test circuit.
Typical Electrical Specifications at 2.6GHz
[1]
T
A
= 25 °C, Vd =4V @ 57mA, R1=300ohm unless otherwise specified.
Symbol
Gain
OIP3
NF
50Ω
OP1dB
IRL
ORL
S12
Parameter and Test Condition
Freq=2.6GHz
Freq=2.6GHz
Freq=2.6GHz
Freq=2.6GHz
Freq=2.6GHz
Freq=2.6GHz
Freq=2.6GHz
Associated Gain
Output Third Order Intercept Point
(2-tone @ F
RF
+/- 2.5MHz, Pin = -20dBm)
Noise Figure in 50Ω system
Output Power at 1dB Gain Compression
Input Return Loss
Output Return Loss
Reverse Isolation
Units
dB
dBm
dB
dBm
dB
dB
dB
Typ.
15.3
33.4
0.97
18.5
-33.4
-8.7
-39.8
Notes:
1. Measurements obtained using demo board described in Figure 31 and Table 1, List 3. Input and output board losses have been de-embedded.
3
Typical Electrical Specifications at 3.5GHz
[1]
T
A
= 25 °C, Vd =4V @ 57mA, R1=300ohm unless otherwise specified.
Symbol
Gain
OIP3
NF
50Ω
OP1dB
IRL
ORL
S12
Parameter and Test Condition
Freq=3.5GHz
Freq=3.5GHz
Freq=3.5GHz
Freq=3.5GHz
Freq=3.5GHz
Freq=3.5GHz
Freq=3.5GHz
Associated Gain
Output Third Order Intercept Point
(2-tone @ F
RF
+/- 2.5MHz, Pin = -20dBm)
Noise Figure in 50Ω system
Output Power at 1dB Gain Compression
Input Return Loss
Output Return Loss
Reverse Isolation
Units
dB
dBm
dB
dBm
dB
dB
dB
Typ.
12.0
32.0
1.25
18.4
-14.9
-11.5
-40.5
Notes:
1. Measurements obtained using demo board described in Figure 31 and Table 1, List 4. Input and output board losses have been de-embedded.
4
MGA-632P8 Typical Performance
[1]
T
A
= +25 °C, Vd = 4V, Id = 57mA, R1=300ohm unless stated otherwise.
21
19
17
Gain (dB)
15
1
0.9
0.8
0.6
0.5
0.4
0.3
0.2
0.1
20mA
40mA
60mA
80mA
40
35
30
OIP3 (dBm)
25
20
15
10
5
20mA
40mA
60mA
80mA
0.7
13
11
9
7
20mA
40mA
60mA
80mA
5
1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 2.10
Frequency (GHz)
NF (dB)
0
1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 2.10
Frequency (GHz)
0
1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 2.10
Frequency (GHz)
Figure 5. Gain Vs Frequency and Id
Figure 6. NF Vs Frequency and Id
Figure 7. OIP3 Vs Frequency and Id
20
18
16
14
Gain (dB)
10
8
6
4
2
0
10
20
30
40
50
60
Id (mA)
70
3V Vd
4V Vd
5V Vd
1
0.9
0.8
0.7
0.5
0.4
0.3
0.2
0.1
90
0
10
20
30
40
50
60
Id (mA)
70
3V Vd
4V Vd
5V Vd
40
35
30
OIP3 (dBm)
25
20
15
10
5
90
0
10
20
30
40
50 60
Id (mA)
70
3V Vd
4V Vd
5V Vd
80
NF (dB)
12
0.6
80
80
90
Figure 8. Gain Vs Id and Vd
Figure 9. NF Vs Id and Vd
Figure 10. OIP3 Vs Id and Vd
80
70
60
50
Gain (dB)
Id (mA)
40
30
20
10
0
0.0
1.0
2.0
3.0
4.0
Vd (V)
5.0
6.0
-40°C
25°C
85°C
7.0
8.0
19
18
17
16
0.9
0.8
0.7
0.6
14
13
12
11
10
1.70
1.75
1.80
1.85 1.90 1.95
Frequency (GHz)
2.00
-40°C
25°C
85°C
NF (dB)
15
0.5
0.4
0.3
0.2
0.1
-40°C
25°C
85°C
2.05
2.10
0.0
1.70
1.75
1.80
1.85 1.90 1.95 2.00
Frequency (GHz)
2.05 2.10
Figure 11. Id Vs Vd and Temperature
Figure 12. Gain Vs Frequency and Temperature
Figure 13. NF Vs Frequency and Temperature
Notes:
1. Measurements obtained using demo board described in Figure 28 and Table 1, List 1.
5
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