MN101C97 Sriese
8-bit Single-chip Microcontroller
Overview
The MN101C series of 8-bit single-chip microcomputers incorporate multiple types of peripheral functions.
This chip series is well suited for camera, VCR, MD, TV, CD, LD, printer, telephone, home automation, pager, air conditioner, PPC, remote
control, fax machine, music instrument and other applications.
This LSI brings to embedded microcomputer applications
flexible,
optimized hardware configurations and a simple efficient instruction
set. The MN101C97D has an internal 64 KB of ROM and 1 KB of RAM. Peripheral functions include 7 external interrupts, 13 internal
interrupts including NMI, 8 timer counters, 2 sets of serial interfaces, A/D converter, watchdog timer, buzzer output, and remote control
output. The configuration of this microcomputer is well suited for application as a system controller in a camera, timer selector for VCR, CD
player, or MD.
With two oscillation system (max. 8 MHz/32 kHz) contained on the chip, the system clock can be switched to high frequency input (high
speed mode), or to low frequency input (low speed mode).
The system clock is generated by dividing the oscillation clock. The best operation clock for the system can be selected by switching its
frequency by software. High speed mode has the normal mode which is based on 2-cycle clock (fosc/2) and the double speed mode which is
based on the same cycle clock with fosc.
A machine cycle (min. instructions execution) in the normal mode is 250 ns when fosc is 8 MHz, and when fosc is 4 MHz, a machine
cycle is 500 ns. A machine cycle in the double speed mode is 125 ns when fosc is 8 MHz, and 250 ns when fosc is 4 MHz. The package are
48-pin TQFP and 44-pin QFP.
Product Summary
This datasheet describes the following model of MN101C97 series. These products have identical function.
However, MN101C97D is described mainly.
Model
MN101C97A
MN101C97D
MN101CF97D
ROM Size
32 KB
64 KB
64 KB
RAM Size
1 KB
1 KB
1 KB
Classification
Mask ROM version
Mask ROM version
Flash EEPROM version
Package
QFP044-P-1010F
TQFP048-P-0707B
QFP044-P-1010F
TQFP048-P-0707B
QFP044-P-1010F
TQFP048-P-0707B
Publication date: January 2011
Ver. JEM
1
MN101C97 Series
Features
ROM Size:
MN101C97D, MN101CF97D
MN101C97A
RAM Size: 1024
×
8 bit
Package:
TQFP48 (7mm square, 0.5mm pitch)
QFP44 (10mm square, 0.8mm pitch) *Under planning
Machine Cycle:
<Mask ROM version MN101C97A / MN101C97D>
High speed mode <fs = fosc / 1>
0.125
ms
/ 8 MHz (2.7 V to 3.6 V)
0.250
ms
/ 4 MHz (1.8 V to 3.6 V)
High speed mode <fs = fosc / 2>
0.250
ms
/ 8 MHz (2.2 V to 3.6 V)
0.500
ms
/ 4 MHz (1.8 V to 3.6 V)
Low speed mode <fs = fx / 2>
62.5
ms
/ 32 kHz
(1.8 V to 3.6 V)
<Flash EEPROM version MN101CF97D>
High speed mode <fs = fosc / 1>
0.250
ms
/ 4 MHz (2.2 V to 3.6 V)
0.270
ms
/ 3.7 MHz (2.0 V to 3.6 V)
0.500
ms
/ 2 MHz (1.8 V to 3.6 V)
High speed mode <fs = fosc / 2>
0.250
ms
/ 8 MHz (2.2 V to 3.6 V)
0.500
ms
/ 4 MHz (1.8 V to 3.6 V)
Low speed mode <fs = fx / 2>
62.5
ms
/ 32 kHz
(1.8 V to 3.6 V)
Clock Gear Circuit Embedded:
The operation speed of system clock can be changed by switching the dividing ratio of the oscillation clock.
(1, 2, 4, 8, 16, 32, 64, 128 dividing)
Oscillation Circuit:
2 channels oscillation circuits (High-speed / Low-speed)
Operation Modes:
NORMAL mode (High-speed mode)
SLOW mode (Low-speed mode)
HALT mode (High-speed / Low-speed mode)
STOP mode
The operation clock can be switched in each mode.
ROM Correction:
Maximum of 3 parts in a program
Operation Voltage: 1.8 V to 3.6 V
Operation Temperature:
-40°C
to + 85°C
65536
×
8 bit
32768
×
8 bit
2
Ver. JEM
MN101C97 Series
Features (Continued)
Memory bank:
Data memory space expansion by bank form (64 KB/2 bank)
Bank for source address / Bank for destination address
Interrupts: 20 interrupts
<External Interrupt> Rising/ falling edge can be specified.
IRQ0 - External Interrupt (Noise
filter
connectable)
IRQ1 - External Interrupt (Noise
filter
connectable)
IRQ2 - External Interrupt (Both edges selectable)
IRQ3 - External Interrupt (Both edges selectable)
IRQ4 - External Interrupt (Both edges selectable)
IRQ5 - External Interrupt (Both edges selectable)
IRQ6 - External Interrupt (Key scan interrupt only)
<Timer Interrupt>
TM0IRQ - Timer 0 interrupt (8-bit timer)
TM1IRQ - Timer 1 interrupt (8-bit timer)
TM2IRQ - Timer 2 interrupt (8 bit timer)
TM3IRQ - Timer 3 interrupt (8-bit timer)
TM6IRQ - Timer 6 interrupt (8-bit timer)
TM7IRQ - Timer 7 interrupt (16-bit timer)
T7OC2IRQ - Timer 7 interrupt (16-bit timer)
TBIRQ - Time base timer interrupt
<Serial Interface Interrupt>
SC0RIRQ - Serial 0 interrupt (UART reception)
SC0TIRQ - Serial 0 interrupt (UART transmission, Synchronous)
SC3IRQ - Serial 3 interrupt (Single master IIC, Synchronous)
<Watchdog Timer Interrupt>
NMI - Watchdog timer overflow
<A/D Conversion End Interrupt>
ADIRQ - A/D conversion end
A/D Converter: 10 bit
×
8 channels
Timer Counter: 8 timers
All timer counters generate Interrupt.
Timer 0 - 8-bit timer
Square wave output, PWM output, Event count, Simple pulse width measurement
Added pulse (2-bit) PWM output, Remote control carrier output
Clock source: fosc, fosc/4, fosc/16, fosc/32, fosc/64, fs/2, fs/4, fx, external clock
Square wave output and PWM output can be output to the large current pin, P51 (TM0O).
Timer 1 - 8-bit timer
Square wave output, Event count, Cascade connection to timer 0
Clock source: fosc, fosc/4, fosc/16, fosc/64, fosc/128, fs/2, fs/8, fx, external clock, timer 7 output
Usable as UART baud rate timer
Timer 2 - 8-bit timer
Square wave output, PWM output, Event count, Simple pulse width measurement
Clock source: fosc, fosc/4, fosc/16, fosc/32, fosc/64, fs/2, fs/4, fx, external clock
Added pulse (2-bit) PWM output
Square wave output and PWM output can be output to the large current pin, P52 (TM2O).
Usable as UART baud rate timer
Ver. JEM
3
MN101C97 Series
Features (Continued)
Timer 3 - 8-bit timer
Square wave output, Event count, Cascade connection to timer 2
Clock source: fosc, fosc/4, fosc/16, fosc/64, fosc/128, fs/2, fs/8, fx, external clock
Timer 6 - 8-bit timer
One minute meter is available when combined with the timer base timer.
Clock source: fosc, fs, fx, time base output (1/2
7
or 1/2
13
)
Timer 7 - 16-bit timer (Double buffer composition)
Square wave output and PWM output (Duty/Cycle continuous changeable) can be output to the large current pin, P53 (TM7O).
Event count, Pulse width measurement, Input capture, Remote control carrier output
Clock source: 1/1, 1/2, 1/4 or 1/16 of fosc, fs or external clock.
Timer base timer
Clock source: fosc, fx
Interrupt generation cycle: fosc, fosc/2
7
, fosc/2
8
, fosc/2
9
, fosc/2
10
, fosc/2
12
, fosc/ 2
13
, fosc/2
14
, fosc/2
15
, fx, fx/2
7
,
fx/2
8
, fx/2
9
, fx/2
10
, fx/2
12
, fx/2
13
, fx/2
14
, fx/2
15
Watchdog timer
Error detection cycle: selectable from fs/2
16
, fs/2
18
, and fs/2
20
.
Buzzer output, Inverted Buzzer output:
Output frequency can be selected from fosc/2
9
, fosc/2
10
, fosc/2
11
, fosc/2
12
, fosc/2
13
, fosc/2
14
, fx/2
3
, fx/2
4
Remote control carrier output:
Based on timer 0 and timer 7 output, a remote control carrier with duty cycle of 1/2 or 1/3 can be output.
Clock output:
Fosc output or fs output is available.
Serial Interface: 2 channels
Serial interface 0 : 3 channel type synchronous / Full duplex UART
Transfer clock: fosc/2, fosc/4, fosc/16, fosc/64, fs/2, fs/4, timer 1 (or timer 2) output, timer 2 output/2, timer 2 output/8
At UART, timer 1 (or timer 2) is used as a baud rate timer
MSB/LSB can be selected as the
first
bit to be transferred.
Any transfer size from 1 to 8 bits can be selected.
Parity check, parity addition, overrun and framing error detection.
Usable as 2 channel type serial interface.
Serial 0 I/O (SBO0, SBI0, SBT0) can be switched to either P10 to P12 or P43 to P45.
Serial interface 3 : 3 channel type synchronous / Single Master IIC Interface
IIC communication for single master (9-bit transfer)
Transfer clock: fosc/2, fosc/4, fosc/16, fosc/64, fs/2, fs/4, timer 1 (or timer 2) output
MSB/LSB can be selected as the
first
bit to be transferred.
Any transfer size from 1 to 8 bits can be selected.
External Interrupt: 7 interrupts
Edge selectable (rising edge, falling edge)
Noise
filter
connectable (IRQ0, IRQ1)
Edge selectable (rising edge, falling edge, both edges) (IRQ 2,3,4,5)
Key scan interrupt only (IRQ6)
LED driver: 6 pins (44-pin QFP package are 4 pins)
×
2 sets
×
4 sets
×
1 set
4
Ver. JEM
MN101C97 Series
Features (Continued)
I/O port: 48 pin TQFP package
I/O port
Ports also used as LED (large current) driver ports
Ports also used as A/D input
Port also used as remote control carrier output
Ports also used as timer output
Ports also used as timer I/O
Ports also used as buzzer output
Ports also used as key interrupt input
Ports also used as external interrupt input
Ports also used as serial interface ports
Special function pins
Analog reference voltage input pin
Mode setting pins
Reset input pin
Oscillator pins
Power supply pins
I/O port: 44 pin QFP package
I/O port
Ports also used as LED (large current) driver ports
Ports also used as A/D input
Port also used as remote control carrier output
Ports also used as timer output
Ports also used as timer I/O
Ports also used as buzzer output
Ports also used as key interrupt input
Ports also used as external interrupt input
Ports also used as serial interface ports
Special function pins
Analog reference voltage input pin
Mode setting pins
Reset input pin
Oscillator pins
Power supply pins
38 ports
6 port
8 ports
1 port
3 ports
5 ports
2 ports
8 ports
6 ports
9 ports
10 ports
1 port
2 ports
1 port
4 ports
2 ports
34 ports
4 ports
8 ports
1 port
3 ports
5 ports
2 ports
7 ports
6 ports
9 ports
10 ports
1 port
2 ports
1 port
4 ports
2 ports
Ver. JEM
5
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