White Electronic Designs
WV3HG32M40SEU-PD4
ADVANCED*
128MB – 32Mx40 DDR2 SDRAM UNBUFFERED, ECC, w/PLL
FEATURES
Unbuffered 200-pin, Small-Outline DIMM (SO-
DIMM)
Suppot ECC error detection and correction
Fast data transfer rates: PC2-5300*, PC2-4200 and
PC2-3200
Utilizes 667*, 533 and 400 Mb/s DDR2 SDRAM
components
V
CC
= 1.8V ±0.1V
V
CCSPD
= 1.7V to 3.6V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Differential clock inputs (CK, CK#)
Four-bit prefetch architecture
Programmable CAS# latency (CL): 3, 4, and 5
Posted CAS# additive latency; 0, 1, 2, 3 and 4
Programmable burst: length (4, 8)
On-die termination (ODT)
On memory PLL clock
Serial Presence Detect (SPD) with EEPROM
Auto & self refresh (64ms: 8,192 cycle refresh)
Gold edge contacts
RoHS Compliant
JEDEC approved Pin-out
Package option:
• 200 Pin (SO-DIMM)
• PCB – 30.00mm (1.181") TYP.
NOTE: Consult factory for availability of:
• Vendor source control options
• Industrial temperature option
DESCRIPTION
The WV3HG32M40SEU is a 32Mx40 Double Data Rate 2
SDRAM memory module based on 512Mb DDR2 SDRAM
components. The module consists of three 32Mx16, in
FBGA package mounted on a 200 pin SO-DIMM FR4
substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
OPERATING FREQUENCIES
PC2-5300*
Clock Speed
CL-t
RCD
-t
RP
Note:
• Consult factory for availability
PC2-4200
266MHz
4-4-4
PC2-3200
200MHz
3-3-3
333MHz
5-5-5
November 2006
Rev. 7
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
PIN CONFIGURATION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Symbol
V
REF
V
SS
DQ0
DQ4
V
SS
DQ5
DQ1
V
SS
DQS0#
DM0
DQS0
V
SS
V
SS
DQ6
DQ2
DQ7
DQ3
V
SS
V
SS
DQ12
DQ8
DQ13
DQ9
V
SS
V
SS
DM1
DQS1#
V
SS
DQS1
DQ14
V
SS
DQ15
DQ10
V
SS
DQ11
DQ20
V
SS
DQ21
DQ16
V
SS
DQ17
RESET#
V
SS
DM2
DQS2#
V
SS
DQS2
DQ22
V
SS
DQ23
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
DQ18
V
SS
DQ19
DQ28
V
SS
DQ29
DQ24
V
SS
DQ25
DM3
V
SS
V
SS
DQS3#
DQ30
DQS3
DQ31
V
SS
V
SS
DQ26
CB4
DQ27
CB5
V
SS
V
SS
CB0
DM8
CB1
V
SS
V
SS
CB6
DQS8#
CB7
DQS8
V
SS
V
SS
CB2
CKE0
CB3
NC
V
SS
NC
NC
V
CC
NC
A12
A11
A9
V
CC
A7
A8
Pin No.
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
Symbol
V
CC
A6
A5
A4
A3
V
CC
A2
A1
V
CC
A0
A10/AP
BA1
BA0
V
CC
RAS#
WE#
V
CC
CS0#
CAS#
ODT0
NC
NC
V
CC
V
CC
NC
CK
NC
CK#
NC
V
SS
V
SS
NC
NC
NC
NC
V
SS
NC
NC
V
SS
V
SS
NC
NC
NC
NC
V
SS
V
SS
NC
NC
NC
NC
Pin No.
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
Symbol
V
SS
V
SS
NC
NC
NC
V
SS
V
SS
NC
NC
NC
NC
V
SS
V
SS
NC
NC
NC
NC
V
SS
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
V
SS
NC
NC
NC
SDA
V
SS
SCL
NC
SA1
V
CC
SPD
SA0
WV3HG32M40SEU-PD4
ADVANCED
PIN NAMES
SYMBOL
A0-A12
ODT0
CK, CK#
CB0 - CB7
CKE0
CS0#
RAS#, CAS#, WE#
BA0, BA1
DM0-DM3, DM8
DQ0-DQ31
DQS0-DQS3,
DQS8
DQS03-DQS3#,
DQS8#
RESET#
SCL
SA0-SA1
SDA
V
CC
V
REF
V
SS
V
CCSPD
NC
DESCRIPTION
Address input
On-Die Termination
Clock Input
Check Bits
Clock Enable input
Chip select
Command Inputs
Bank Address Inputs
Input Data Mask
Data Input/Output
Data Strobe
Data Strobe Complement
PLL Output Enable input
SPD Clock Input
SPD Address Inputs
Serial Data Input/Output
Power Supply
Input/Output reference voltage
Ground
Serial EEPROM Power Supply
No Connect
November 2006
Rev. 7
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WV3HG32M40SEU-PD4
ADVANCED
FUNCTIONAL BLOCK DIAGRAM
RCS0#
DQS0
DQS0#
DM0
CS#
DQS
DQS#
DM/RDQS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
DQS
DQS#
DM/RDQS
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
DQS1
DQS1#
DM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQS2
DQS2#
DM2
DQS3
DQS3#
DM3
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
V
CC
120 Ohm
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS
DQS#
DM/RDQS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
DQS
DQS#
DM/RDQS
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
CS#
DQS8
DQS8#
DM8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
LDQS
CS#
LDQS#
LDM/RDQS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
UDQS
UDQS#
UDM/RDQS
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
CK
CK#
P
L
L
OE
PCK0-PCK2 → CK: DDR2 SDRAMs
PCK0# → PCK2# → CK#: DDR2 SDRAMs
RESET#
CS0#
BA0-BA1
A0-A12
RAS#
CAS#
WE#
CKE0
ODT0
RCS0# → CS#: DDR2 SDRAMs
BA0-BA1 → BA0-BA1: DDR2 SDRAMs
A0-A12 → A0-A12: DDR2 SDRAMs
RAS# → RAS#: DDR2 SDRAMs
CAS# → CAS#: DDR2 SDRAMs
WE# → WE#: DDR2 SDRAMs
CKE0 → CKE: DDR2 SDRAMs
ODT0 → ODT: DDR2 SDRAMs
SCL
Serial PD
WP A0
A1
A2
SA0 SA1
SDA
V
CCSPD
V
CC
V
REF
Serial PD
DDR2 SDRAMs
DDR2 SDRAMs
DDR2 SDRAMs
NOTE: 1. All resistor value, are 22 ohms ± 5% unless otherwise specified.
2. DQ-to-I/O wiring may be changed per nibble.
V
SS
November 2006
Rev. 7
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
Symbol
V
CC
V
IN
, V
OUT
T
STG
Parameter
Voltage on V
CC
pin relative to V
SS
Voltage on any pin relative to V
SS
Storage Temperature
WV3HG32M40SEU-PD4
ADVANCED
ABSOLUTE MAXIMUM RATINGS
Min
-0.5
-0.5
-55
Command/Address,
RAS#, CAS#, WE#
I
L
Input leakage current; Any input 0V<V
IN
<V
CC
;
VREF
input
0V<V
IN
<0.95V; Other pins not under test = 0V
CS#, CKE
CK, CK#
DM
I
OZ
I
VREF
Output leakage current; 0V<V
IN
<V
CC
; DQs and ODT are
disable
DQ, DQS, DQS#
-15
-15
-10
-5
-5
-6
Max
2.3
2.3
100
15
15
10
5
5
6
Units
V
V
˚C
μA
μA
μA
μA
μA
μA
V
REF
leakage current; V
REF
= Valid
VREF
level
DC OPERATING CONDITIONS
All voltages referenced to V
SS
Rating
Parameter
Supply Voltage
I/O Reference Voltage
I/O Termination Voltage
SPD Supply Voltage
Symbol
V
CC
V
REF
V
TT
V
CCSPD
Min.
1.7
0.49 x V
CC
V
REF
-0.04
1.7
Type
1.8
0.50 x V
CC
V
REF
-
Max.
1.9
0.51 x V
CC
V
REF
+0.04
3.6
Units
V
V
V
V
Notes
3
1
2
Notes:
1. V
REF
is expected to equal V
CC
/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on V
REF
may not exceed +/-1 percent of the DC
value. Peak-to-peak AC noise on V
REF
may not exceed +/-2 percent of V
REF
. This measurement is to be taken at the nearest V
REF
bypass capacitor.
2. V
TT
in sot applied directly to the device. V
TT
is a system supply for signal termination resistors, is expected to be set equal to V
REF
and must track variations in the DC level of V
REF
.
3. V
CCQ
of all IC's are tied to V
CC
.
November 2006
Rev. 7
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
T
A
= 25°C, f = 100MHz
Parameter
Input Capacitance (A0~A12, BA0~BA1, RAS#, CAS#, WE#)
Input Capacitance CKE0, ODT0
Input Capacitance CS0#
Input Capacitance (CK, CK#)
Input Capacitance (DM0 ~ DM3, DM8), (DQS0 ~ DQS3, DQS8)
Input Capacitance (DQ0 ~ DQ31) (CB0 ~ CB7)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
(665)
C
IN5
(534)
C
OUT1
(665)
C
OUT1
(534)
WV3HG32M40SEU-PD4
ADVANCED
INPUT/OUTPUT CAPACITANCE
Min
7
7
7
6
6.5
6.5
6.5
6.5
Max
10
10
10
7
7.5
8
7.5
8
Units
pF
pF
pF
pF
pF
pF
pF
pF
OPERATING TEMPERATURE CONDITION
Parameter
Operating temperature (Commercial)
Symbol
TOPER
Rating
0
°
to 85°
Units
°C
Notes
1, 2
Notes:
1. Operating temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JEDED JESD51.2
2. At 0°C - 85°C, operation temperature range, all DRAM specification will be supported.
INPUT DC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Symbol
V
IH
(DC)
V
IL
(DC)
Min
V
REF
+ 0.125
-0.300
Max
V
CC
+ 0.300
V
REF
- 0.125
Units
V
V
INPUT AC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
Input High (Logic 1) Voltage DDR2-400 & DDR2-533
Input Low (Logic 1) Voltage DDR2-667
Input Low (Logic 0) Voltage DDR2-400 & DDR2-533
Input Low (Logic 0) Voltage DDR2-667
Symbol
V
IH
(AC)
V
IH
(AC)
V
IL
(AC)
V
IL
(AC)
Min
V
REF
+ 0.250
V
REF
+ 0.200
-
-
Max
-
-
V
REF
- 0.250
V
REF
- 0.200
Units
V
V
V
V
November 2006
Rev. 7
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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