The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-13706-6E
16-bit Proprietary Microcontroller
CMOS
F
2
MC-16LX MB90550A/550B Series
MB90552A/552B/553A/553B/T552A/T553A
MB90F553A/P553A/V550A
■
DESCRIPTION
The MB90550A/550B series is a line of general-purpose, high-performance, 16-bit microcontrollers designed for
applications which require high-speed real-time processing, such as industrial machines, OA equipment, and
process control systems.
While inheriting the AT architecture of the F
2
MC*-8 family, the instruction set for the MB90550A/550B series
incorporates additional instructions for high-level languages, supports extended addressing modes, and contains
enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation
instructions. In addition, the MB90550A/550B has an on-chip 32-bit accumulator which enables processing of
long-word data.
MB90552B and MB90553B are radiation noise decreased type. There are no change in the functional specifica-
tion.
*: F
2
MC is the abbreviation of FUJITSU MICROELECTRONICS Flexible Microcontroller.
■
FEATURES
• Minimum instruction execution time: 62.5 ns (at oscillation of 4 MHz,
×
four times the PLL clock)
• Maximum memory space: 16 Mbytes
(Continued)
The information for microcontroller supports is shown in the following homepage.
Be sure to refer to the "Check Sheet" for the latest cautions on development.
"Check Sheet" is seen at the following support page
"Check Sheet" lists the minimal requirement items to be checked to prevent problems beforehand in
system development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.9
MB90550A/550B Series
(Continued)
• Instruction set optimized for controller applications
Supported data types: Bit, byte, word and long word
Typical addressing mode: 23 types
Enhanced precision calculation realized by 32-bit accumulator
Enhanced signed multiplication/division instruction and RETI instruction functions
• Instruction set designed for high level language (C) and multi-task operations
Adoption of system stack pointer
Symmetrical instruction set and barrel shift instructions
• Integrated address match detection function (for two address pointers)
• Faster execution speed: 4-byte queue
• Powerful interrupt functions (Eight priority levels programmable)
External interrupt inputs: 8 channels
• Data transfer functions (Intelligent I/O service): Up to 16 channels
DTP request inputs: 8 channels
• Embedded ROM size (EPROM, Flash: 128 Kbytes)
Mask ROM: 64 Kbytes/128 Kbytes
• Embedded RAM size (EPROM, Flash: 4 Kbytes)
Mask ROM: 2 Kbytes/4 Kbytes
• General-purpose ports: Up to 83 channels
(Input pull-up resistor settable for: 16 channels; Open drain settable for: 8 channels; I/O open drains: 6
channels)
• A/D converter (RC successive approximation type): 8 channels
(Resolution: 8 or 10 bits selectable; Conversion time of 26.3
µs
minimum)
• UART: 1 channel
• Extended I/O serial interface: 2 channels
• I
2
C interface: 2 channels
(Two channels, including one switchable between terminal input and output)
• 16-bit reload timer: 2 channels
• 8/16-bit PPG timer: 3 channels
(8 bits
×
2 channels; 16 bits x 1 channel: Mode switching function provided)
• 16-bit I/O timer
(Input capture
×
4 channels, output compare
×
4 channels, free run timer
×1
channel)
• Clock monitor function integrated (Delivering the oscillation clock divided by 21 to 28)
• Timebase timer/watchdog timer: 18 bits
• Low power consumption modes (sleep, stop, hardware standby, and CPU intermittent operation modes)
• Package: QFP-100, LQFP-100
• CMOS technology
2
DS07-13706-6E
MB90550A/550B Series
■
PRODUCT LINEUP
Part number
Item
Classification
ROM size
RAM size
MB90552A MB90553A MB90F553A MB90P553A MB90T552A MB90T553A MB90V550A
MB90552B MB90553B
Mask ROM products
Flash ROM
products
128 Kbytes
4 Kbytes
OTP
External ROM products
Mass Product
64 Kbytes
2 Kbytes
None
2 Kbytes
4 Kbytes
Evaluation
product
None
6 Kbytes
CPU functions
The number of instructions: 340
Instruction bit length: 8 bits, 16 bits
Instruction length: 1 byte to 7 bytes
Data bit length: 1 bit, 8 bits, 16 bits
Minimum execution time: 62.5 ns (at machine clock of 16 MHz)
Interrupt processing time: 1.5
µs
(at machine clock of 16 MHz, minimum value)
General-purpose I/O ports (CMOS output): 53
General-purpose I/O ports (with pull-up resistor): 16
General-purpose I/O ports (N-channel open-drain output): 6
General-purpose I/O ports (N-channel open-drain function selectable): 8
Total: 83
Clock synchronized transmission (62.5 Kbps to 2 Mbps)
Clock asynchronized transmission (62500 bps to 9615 bps)
Transmission can be performed by bi-directional serial transmission or by
master/slave connection.
Conversion precision: 8/10-bit can be selectively used.
Number of inputs: 8
One-shot conversion mode (converts selected channel only once)
Scan conversion mode (converts two or more successive channels and can program up to
8 channels.)
Continuous conversion mode (converts selected channel continuously)
Stop conversion mode (converts selected channel and stop operation repeatedly)
Number of channels: 3 (8-bit
×
6 channels)
PPG operation of 8-bit or 16-bit
A pulse wave of given intervals and given duty ratios can be output.
Pulse interval: 62.5 ns to 1 ms (at oscillation of 4 MHz, machine clock of 16 MHz)
Number of channels: 1
Overflow interrupts
Number of channels: 4
Pin input factor: A match signal of compare register
Number of channels: 4
Rewriting a register value upon a pin input (rising, falling or both edges)
(Continued)
Ports
UART (SCI)
8/10-bit A/D
converter
8/16-bit PPG timer
16-bit
free run timer
16-bit
Output com-
I/O
pare (OCU)
timer
Input capture
(ICU)
DS07-13706-6E
3
MB90550A/550B Series
(Continued)
Part number
Item
DTP/external
interrupt circuit
Extended I/O serial
interface
I
2
C interface
Timebase timer
MB90552A MB90553A MB90F553A MB90P553A MB90T552A
MB90552B MB90553B
MB90T553A MB90V550A
Number of inputs: 8
Started by a rising edge, a falling edge, an “H” level input, or an “L” level input.
External interrupt circuit or extended intelligent I/O service (EI
2
OS) can be used.
Clock synchronized transmission (3125 bps to 1 Mbps)
LSB first/MSB first
Serial I/O port for supporting Inter IC BUS
18-bit counter
Interrupt interval: 1.024 ms, 4.096 ms, 16.384 ms, 131.072 ms
(at oscillation of 4 MHz)
Reset generation interval: 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms
(at oscillation of 4 MHz, minimum value)
CMOS
4.5 V to 5.5 V
Watchdog timer
Process
Power supply volt-
age for operation*
*:Varies with conditions such as the operating frequency. (See section “■ ELECTRICAL CHARACTERISTICS”)
Assurance for the MB90V550A is given only for operation with a tool at a power voltage of 4.5 V to 5.5 V, an
operating temperature of 0°C to +25°C, and an operating frequency of 1 MHz to 16 MHz.
■
PACKAGE AND CORRESPONDING PRODUCTS
Package
FPT-100P-M20
FPT-100P-M06
: Available
×:
Not available
MB90552A
MB90552B
MB90553A
MB90553B
MB90F553A
MB90P553A
×
Note:For more information about each package, see section “■ PACKAGE DIMENSIONS”
■
DIFFERENCES AMONG PRODUCTS
Memory Size
In evaluation with an evaluation product, note the difference between the evaluation product and the product
actually used. The following items must be taken into consideration.
• The MB90V550A does not have an internal ROM. However, operations equivalent to those performed by a
chip with an internal ROM can be evaluated by using a dedicated development tool, enabling selection of ROM
size by setting the development tool.
• In the MB90V550A, images from FF4000
H
to FFFFFF
H
are mapped to bank 00, and FE0000
H
to FF3FFF
H
are mapped to bank FE and FF only. (This setting can be changed by configuring the development tool.)
• In the MB90F553A/553A/553B/552A/552B, images from FF4000
H
to FFFFFF
H
are mapped to bank 00, and
FF0000
H
to FF3FFF
H
to bank FF only.
4
DS07-13706-6E
stm32/stm8
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