UC284XA
UC384XA
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
NOT FOR NEW DESIGN
1
■
■
■
■
■
■
FEATURES
TRIMMED OSCILLATOR DISCHARGE
CURRENT
CURRENT MODE OPERATION TO 500kHz
AUTOMATIC FEED FORWARD
COMPENSATION
LATCHING PWM FOR CYCLE-BY-CYCLE
CURRENT LIMITING
INTERNALLY TRIMMED REFERENCE WITH
UNDERVOLTAGE LOCKOUT
HIGH CURRENT TOTEM POLE OUTPUT
UNDERVOLTAGE LOCKOUT WITH
HYSTERESIS
LOW START-UP CURRENT (< 0.5mA)
DOUBLE PULSE SUPPRESSION
Figure 1. Package
DIP-8
SO-8
Table 1. Order Codes
Part Number
UC2842AD1; UC3842AD1;
UC2843AD1; UC3843AD1;
UC2844AD1; UC3844AD1;
UC2845AD1; UC3845AD1
UC2842AN; UC3842AN;
UC2843AN; UC3843AN;
UC2844AN; UC3844AN;
UC2845AN; UC3845AN
Package
SO-8
DIP-8
2
DESCRIPTION
The UC384xA family of control ICs provides the
necessary features to implement off-line or DC to
DC fixed frequency current mode control schemes
with a minimal external parts count. Internally im-
plemented circuits include a trimmed oscillator for
precise DUTY CYCLE CONTROL under voltage
lockout featuring start-up current less than 0.5mA,
a precision reference trimmed for accuracy at the
error amp input, logic to insure latched operation,
a PWM comparator which also provides current
limit control, and a totem pole output stage de-
signed to source or sink high peak current. The
output stage, suitable for driving N-Channel MOS-
FETs, is low in the off-state.
Differences between members of this family are
the under-voltage lockout thresholds and maxi-
mum duty cycle ranges. The UC3842A and
UC3844A have UVLO thresholds of 16V (on) and
10V (off), ideally suited off-line applications The
corresponding thresholds for the UC3843A and
UC3845A are 8.5 V and 7.9V. The UC3842A and
UC3843A can operate to duty cycles approaching
100%. A range of the zero to < 50 % is obtained by
the UC3844A and UC3845A by the addition of an
internal toggle flip flop which blanks the output off
every other clock cycle.
Figure 2. Block Diagram
(toggle flip flop used only in UC3844A and UC3845A)
Vi
7
34V
GROUND
5
UVLO
S/R
5V
REF
INTERNAL
BIAS
VREF GOOD
LOGIC
RT/CT
4
OSC
ERROR AMP.
2R
R
1V
T
8
VREF
5V 50mA
2.50V
6
OUTPUT
VFB
COMP
CURRENT
SENSE
2
1
3
+
-
S
R
CURRENT
SENSE
COMPARATOR
D95IN331
PWM
LATCH
May 2004
REV. 5
1/16
UC384XA - UC284XA
Table 2. Absolute Maximum Ratings
Symbol
V
i
V
i
I
O
E
O
Supply Voltage (Ii < 30mA)
Output Current
Output Energy (capacitive load)
Analog Inputs (pins 2, 3)
Error Amplifier Output Sink Current
P
tot
P
tot
T
stg
T
J
T
L
Power Dissipation at T
amb
≤
25 °C (DIP-8)
Power Dissipation at T
amb
≤
25
°C
(SO-8)
Storage Temperature Range
Junction Operating Temperature
Lead Temperature (soldering 10s)
Parameter
Supply Voltage (low impedance source)
Value
30
Self Limiting
±1
5
– 0.3 to 5.5
10
1.25
800
– 65 to 150
– 40 to 150
300
A
µJ
V
mA
W
mW
°C
°C
°C
Unit
V
* All voltages are with respect to pin 5, all currents are positive into the specified terminal.
Figure 3. DIP-8/SO-8 Pin Connection
(Top view)
COMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
D95IN332
8
7
6
5
V
REF
Vi
OUTPUT
GROUND
Table 3. Pin Description
N°
1
2
3
4
5
6
7
8
Pin
COMP
V
FB
I
SENSE
R
T
/C
T
GROUND
OUTPUT
V
CC
V
ref
Function
This pin is the Error Amplifier output and is made available for loop compensation.
This is the inverting input of the Error Amplifier. It is normally connected to the switching power
supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
The oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor R
T
to V
ref
and cpacitor C
T
to ground. Operation to 500kHz is possible.
This pin is the combined control circuitry and power ground.
This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced
and sunk by this pin.
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor C
T
through resistor R
T
.
2/16
UC384XA - UC284XA
Table 4. Thermal Data
Symbol
R
th j-amb
Parameter
Thermal Resistance Junction-ambient
Max.
DIP-8
100
SO-8
150
Unit
°C/W
Table 5. Electrical Characteristcs
( [note 1] Unless otherwise stated, these specifications apply for -25 < T
amb
< 85°C for UC284XA;
0 < T
amb
< 70°C for UC384XA; V
i
= 15V (note 5); R
T
= 10K; C
T
= 3.3nF)
Symbol
Parameter
Test Condition
UC284XA
Min.
4.95
Typ.
5.00
2
3
0.2
4.9
50
5
-30
T
j
= 25°C
V
CC
= 12V to 25V
T
A
= T
low
to T
high
(peak to peak)
T
J
= 25°C
V
PIN1
= 2.5V
V
FB
= 5V
2V
≤
V
o
≤
4V
T
J
= 25°C
12V
≤
V
i
≤
25V
V
PIN2
= 2.7V
V
PIN1
= 1.1V
V
PIN2
= 2.3V V
PIN1
= 5V
V
PIN2
= 2.3V;R
L
= 15KΩ to
Ground
V
PIN2
= 2.7V;R
L
= 15KΩ to
Pin 8
(note 3 & 4)
V
PIN1
= 5V (note 3)
12
≤
V
i
≤
25V (note 3)
2.85
0.9
65
0.7
60
2
-0.5
5
47
–
–
–
7.8
2.45
-100
52
0.2
5
1.6
8.3
2.50
-0.1
90
1
70
12
-1
6.2
0.8
1.1
25
-180
57
1
–
–
8.8
2.55
-1
65
0.7
60
2
-0.5
5
-30
47
–
–
–
7.8
2.42
5.1
4.82
50
5
-100
52
0.2
5
1.6
8.3
2.50
-0.1
90
1
70
12
-1
6.2
0.8
1.1
25
-180
57
1
–
–
8.8
2.58
-2
Max.
5.05
20
25
UC384XA
Min.
4.90
Typ.
5.00
2
3
0.2
5.18
Max.
5.10
20
25
Unit
REFERENCE SECTION
V
REF
∆V
REF
∆V
REF
Output Voltage
Line Regulation
Load Regulation
Total Output Variation
e
N
Output Noise Voltage
Long Term Stability
T
j
= 25°C I
o
= 1mA
12V
≤
V
i
≤
25V
1
≤
I
o
≤
20mA
(Note 2)
Line, Load, Temperature
10Hz
≤
f
≤
10KHz
T
j
= 25°C (note 2)
T
amb
V
mV
mV
mV/°C
V
µV
mV
mA
KHz
%
%
V
mA
V
µA
dB
MHz
dB
mA
mA
V
V
∆V
REF
/∆T Temperature Stability
= 125°C,
1000Hrs
(note 2)
I
SC
f
OSC
Output Short Circuit
Frequency
OSCILLATOR SECTION
∆f
OSC
/∆V Frequency Change with Volt.
∆V
REF
/∆T Frequency Change with Temp.
V
OSC
I
dischg
V
2
I
b
BW
PSRR
I
o
I
o
Oscillator Voltage Swing
Discharge Current (V
OSC
=2V)
Input Voltage
Input Bias Current
A
VOL
Unity Gain Bandwidth
Power Supply Rejec. Ratio
Output Sink Current
Output Source Current
V
OUT
High
V
OUT
Low
CURRENT SENSE SECTION
G
V
V
3
SVR
I
b
Gain
Maximum Input Signal
Supply Voltage Rejection
Input Bias Current
Delay to Output
3
1
70
-2
150
-10
300
3.15
1.1
2.85
0.9
3
1
70
-2
150
-10
300
3.15
1.1
V/V
V
dB
µA
ns
ERROR AMP SECTION
3/16
UC384XA - UC284XA
Table 5. Electrical Characteristcs
(continued)
( [note 1] Unless otherwise stated, these specifications apply for -25 < T
amb
< 85°C for UC284XA;
0 < T
amb
< 70°C for UC384XA; V
i
= 15V (note 5); R
T
= 10K; C
T
= 3.3nF)
Symbol
Parameter
Test Condition
UC284XA
Min.
Typ.
0.1
1.6
13
12
13.5
13.5
0.7
50
50
(2)
UC384XA
Min.
Typ.
0.1
1.6
13
12
1.2
150
150
13.5
13.5
0.7
50
50
1.2
150
150
Max.
0.4
2.2
Max.
0.4
2.2
Unit
OUTPUT SECTION
V
OL
V
OH
V
OLS
t
r
t
f
Output Low Level
Output High Level
UVLO Saturation
Rise Time
Fall Time
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
V
CC
= 6V; I
SINK
= 1mA
T
j
= 25°C
C
L
= 1nF
(2)
T
j
= 25°C
C
L
= 1nF
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold
Min Operating Voltage
After Turn-on
PWM SECTION
Maximum Duty Cycle
Minimum Duty Cycle
TOTAL STANDBY CURRENT
I
st
Start-up Current
V
i
= 6.5V for UCX843A/
45A
V
i
= 14V for UCX842A/44A
I
i
V
iz
Operating Supply Current
Zener Voltage
V
PIN2
= V
PIN3
= 0V
I
i
= 25mA
30
0.3
0.3
12
36
0.5
0.5
17
30
0.3
0.3
12
36
0.5
0.5
17
mA
mA
mA
V
X842A/3A
X844A/5A
94
47
96
48
100
50
0
94
47
96
48
100
50
0
%
%
%
X842A/4A
X843A/5A
X842A/4A
15
7.8
9
16
8.4
10
17
9.0
11
14.5
7.8
8.5
16
8.4
10
17.5
9.0
11.5
V
V
V
ns
V
V
V
V
V
ns
Notes: 1. Max package power dissipation limits must be respected; low duty cycle pulse techniques are used during test maintain T
j
as close
to T
amb
as possible.
2. These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with V
PIN2
= 0.
4. Gain defined as : A =
∆V
PIN1
/∆V
PIN3
; 0
≤
V
PIN3
≤
0.8V
5. Adjust V
i
above the start threshold before setting at 15 V.
4/16
UC384XA - UC284XA
Figure 4. Open Loop Test Circuit.
V
REF
4.7KΩ
2N2222
100KΩ
ERROR AMP.
ADJUST
4.7KΩ
COMP
V
FB
1KΩ
I
SENSE
ADJUST
5KΩ
I
SENSE
R
T
/C
T
R
T
V
REF
1
2
3
4
8
7
V
i
0.1µF
6
5
OUTPUT
GROUND
1W
1KΩ
OUTPUT
A
0.1µF
V
i
C
T
D95IN343
GROUND
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and
bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5 KΩ
potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
Figure 5. Oscillator Frequency vs Timing
Resistance
f
o
(Hz)
D96IN362
Figure 7. Oscillator Discharge Current vs.
Temperature.
I
dischg
(mA)
D95IN335
V
i
=15V
V
OSC
=2V
1M
CT
=4
70
pF
8.5
1nF
100K
2.2
nF
4.7
nF
8.0
10K
7.5
1K
300
1K
3K
10K
30K
R
T
(Ω)
7.0
-55
-25
0
25
50
75
100 T
A
(˚C)
Figure 6. Maximum Duty Cycle vs Timing
Resistor
f
o
(Hz)
D96IN363
Figure 8. Error Amp Open-Loop Gain and
Phase vs. Frequency.
(dB)
80
D95IN337
φ
30
60
90
120
150
80
Gain
60
V
i
=15V
V
O
=2V to 4V
R
L
=100K
T
A
=25˚C
60
40
40
Phase
20
20
0
-20
10
0
300
1K
3K
10K
30K
R
T
(Ω)
100
1K
10K
100K
1M
180
f(Hz)
5/16
嵌入式系统
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