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SG-8002LBFREQ1-SHLL3:ROHS

产品描述LVCMOS Output Clock Oscillator, 1MHz Min, 27MHz Max, ROHS COMPLIANT PACKAGE-4
产品类别无源元件    振荡器   
文件大小666KB,共4页
制造商Seiko Epson Corporation
标准
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SG-8002LBFREQ1-SHLL3:ROHS概述

LVCMOS Output Clock Oscillator, 1MHz Min, 27MHz Max, ROHS COMPLIANT PACKAGE-4

SG-8002LBFREQ1-SHLL3:ROHS规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Seiko Epson Corporation
Objectid1794393501
Reach Compliance Codecompliant
compound_id216712711
其他特性TAPE AND REEL
最长下降时间3 ns
频率调整-机械NO
频率稳定性50%
JESD-609代码e3/e6
安装特点SURFACE MOUNT
最大工作频率27 MHz
最小工作频率1 MHz
最高工作温度85 °C
最低工作温度-40 °C
振荡器类型LVCMOS
输出负载15 pF
物理尺寸5.0mm x 2.8mm x 1.2mm
最长上升时间3 ns
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装YES
最大对称度60/40 %
端子面层TIN/TIN BISMUTH

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Crystal oscillator
Epson Toyocom
Product Number (please contact us)
CRYSTAL OSCILLATOR
PROGRAMMABLE
Q3323LBxxxxxx00
SG - 8002 LB
series
•Frequency
range
:
1 MHz to 125 MHz
•Supply
voltage
:
3.3 V / 5.0 V
•Function
:
Output enable(OE) or Standby(
ST
)
•External
dimensions
:
5.0 × 3.2 × 1.2 t (mm)
•Short
mass production lead time by PLL technology.
•SG-Writer
available to purchase.
Please contact Epson Toyocom or local sales representative.
Actual size
Specifications (characteristics)
Specifications
*2
Remarks
PH
/
SH
PC
/
SC
1 MHz to 80 MHz
-
V
CC
=4.5 V to 5.5 V
Output frequency range
f
0
-
1 MHz to 125 MHz
V
CC
=3.0 V to 3.6 V
-
1 MHz to 66.7 MHz
V
CC
=2.7 V to 3.6 V
Supply voltage
V
CC
4.5 V to 5.5 V
2.7 V to 3.6 V
Storage temperature
-40
°C
to +125
°C
Store as bare product after unpacking
T_stg
Temperature
range
Operating temperature
-20
°C
to +70
°C
(-40
°C
to +85
°C)
Refer to “Outline specifications” (Frequency range)
T_use
B:
±50 ×
10
-6
,C:
±100 ×
10
-6
-20
°C
to +70
°C
Frequency tolerance
f_tol
M:
±100 ×
10
-6
*3
-40
°C
to +85
°C
-40
°C
to +85
°C,
V
CC
±5
%
*3
L:
±
50
×
10
-6
30 mA Max.
-
No load condition,
f
0
=80 MHz
Current consumption
I
CC
-
28 mA Max.
No load condition,
f
0
=125 MHz
25 mA Max.
-
P Type only,
f
0
=80 MHz
Disable current
I_dis
-
16 mA Max.
P Type only,
f
0
=125 MHz
Stand-by current
I_std
50
µA
Max.
S Type only,
ST
=GND
40 % to 60 %
-
50 % V
CC
, L_CMOS=15 pF,
≤80
MHz
45 % to 55 %
-
50 % V
CC
, L_CMOS=25 pF,
≤50
MHz
Symmetry
*1
SYM
-
40 % to 60 %
50 % V
CC
, L_CMOS=15 pF, V
CC
=3.0 V to 3.6 V,
≤125
MHz
-
40 % to 60 %
50 % V
CC
, L_CMOS=15 pF, V
CC
=2.7 V to 3.6 V,
≤66.7
MHz
-
45 % to 55 %
50 % V
CC
, L_CMOS=15 pF, V
CC
=3.0 V to 3.6 V,
≤40
MHz
High output voltage
V
OH
V
CC
-0.4 V Min.
I
OH
=-16 mA(PH,SH),-8 mA(PC,SC)
Low output voltage
V
OL
0.4 V Max.
I
OL
= 16 mA(PH,SH), 8 mA(PC,SC)
Output load condition(CMOS)
*1
L_CMOS
15 pF Max.
Max. frequency and Max. supply voltage
Output enable / disable
V
IH
2.0 V Min.
70 % V
CC
Min.
ST
terminal or OE terminal
input voltage
0.8 V Max.
20 % V
CC
Max.
V
IL
Rise time / Fall time
*1
t
r
/
t
f
3 ns Max.
20 % V
CC
to 80 % V
CC
level, L_CMOS=Max.
10 ms Max.
Time at minimum supply voltage to be 0 s
Start-up time
t_str
+25
°C,
V
CC
=5.0 V/ 3.3 V (PC
/
SC) First year
±5 ×
10
-6
/ year Max.
Frequency aging
f_aging
*1
Operating temperature (-40
°C
to +85
°C),
the available frequency, symmetry and output load conditions, please refer to “Outline specifications” page.
Item
Symbol
*2
*3
PLL-PLL connection & Jitter specification, please refer to “Jitter specifications and characteristics chart” page.
PH,SH for “M” tolerance and “L” tolerance will be available up to 27 MHz. Checking possible by the Frequency checking program.
(Unit:mm)
External dimensions
5.0
±
0.2
Footprint (Recommended)
(Unit:mm)
#4
#3
3.2
±0.2
FCC21A
#1
#2
2.8
E 125.0B
Pin m ap
Pin. Connection
1
OE or
ST
2
GND
3
OUT
4
V
CC
1.6
1.2 Max.
0.1
1.0
2.54
0m in.
(0.35)
2.5
(0.35)
Note.
OE pin (P H, PC)
OE pin = "H" or "open" : Specified frequency output.
OE pin = "L" : Output is high impedanc e.
S T
pin (SH, SC)
S T
pin = "H" or "open" : Specified frequency output.
S T
pin = "L" : Output is low level (weak pull - down),oscillation stops.
2.2
2.54
M etal may be exposed on the top or bottom of this product.
This will not affect any quality, reliability or electrical spec.
To maintain stable operation, provide by-pass capacitor
with more than 0.1
µF
at a location as near as possible to
the power source terminal of the crystal products
(between V
CC
- GND).
http://www.epsontoyocom.co.jp
1.5

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