$GYDQFHG 3RZHU 026)(7
FEATURES
♦
Avalanche Rugged Technology
♦
Rugged Gate Oxide Technology
♦
Lower Input Capacitance
♦
Improved Gate Charge
♦
Extended Safe Operating Area
♦
Lower Leakage Current: 10µA (Max.) @ V
DS
= 200V
♦
Lower R
DS(ON)
: 1.185Ω (Typ.)
IRLR/U210A
BV
DSS
= 200 V
R
DS(on)
= 1.5Ω
I
D
= 2.7 A
D-PAK
2
1
3
1
I-PAK
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25°C)
Continuous Drain Current (T
C
=100°C)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
A
=25°C) *
Total Power Dissipation (T
C
=25°C)
Linear Derating Factor
T
J
, T
STG
T
L
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8
from case for 5-seconds
(2)
(1)
(1)
(3)
(1)
Value
200
2.7
1.7
9
±20
24
2.7
2.1
5
2.5
21
0.17
- 55 to +150
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
300
Thermal Resistance
Symbol
R
θJC
R
θJA
R
θJA
Characteristic
Junction-to-Case
Junction-to-Ambient *
Junction-to-Ambient
Typ.
--
--
--
Max.
5.7
50
110
°C/W
Units
*
When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
1
IRLR/U210A
Electrical Characteristics
(T
C
=25°C unless otherwise specified)
Symbol
BV
DSS
∆BV/∆T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain ( Miller ) Charge
Min. Typ. Max. Units
200
--
1.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.19
--
--
--
--
--
--
1.9
185
35
14
9
9
20
6
6.1
1.4
2.8
--
--
2.0
100
-100
10
100
1.5
--
240
45
20
30
30
50
20
9
--
--
nC
ns
pF
µA
Ω
Ω
V
V
nA
1&+$11(/
32:(5 026)(7
Test Condition
V
GS
=0V,I
D
=250µA
V/°C I
D
=250µA
V
GS
=20V
V
GS
=-20V
V
DS
=200V
See Fig 7
V
DS
=5V,I
D
=250µA
V
DS
=160V,T
C
=125°C
V
GS
=5V,I
D
=1.35A
V
DS
=40V,I
D
=1.35A
(4)
(4)
V
GS
=0V,V
DS
=25V,f =1MHz
See Fig 5
V
DD
=100V,I
D
=3.3A,
R
G
=22Ω
See Fig 13
V
DS
=160V,V
GS
=5V,
I
D
=3.3A
(4) (5)
See Fig 6 & Fig 12
(4) (5)
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
(1)
(4)
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
123
0.38
2.7
9
1.5
--
--
A
V
ns
µC
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25°C,I
S
=2.7A,V
GS
=0V
T
J
=25°C,I
F
=3.3A
di
F
/dt=100A/µs
(4)
Notes;
Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
L=5mH, I
AS
=2.7A, V
DD
=50V, R
G
=27Ω, Starting T
J
=25°C
I
SD
≤
3.3A, di/dt
≤
140A/µs, V
DD
≤
BV
DSS
, Starting T
J
=25°C
Pulse Test: Pulse Width = 250µs, Duty Cycle
≤
2%
Essentially Independent of Operating Temperature
2
1&+$11(/
32:(5 026)(7
Fig 1. Output Characteristics
1
1
0
V
GS
Top :
7.0V
6.0V
IRLR/U210A
Fig 2. Transfer Characteristics
1
1
0
I
D
, Drain Current [A]
1
0
0
4.5V
4.0V
3.5V
Bottom : 3.0 V
I
D
, Drain Current [A]
5.5V
5.0V
1
0
0
1 0
o
C
5
2
o
C
5
1
-1
0
@Nts:
oe
1 2 0
µ
s P l e T s
. 5
us et
2 T = 2
o
C
.
C
5
1
0
0
DS
@Nts:
oe
1 V =0V
.
GS
- 5
o
C
5
2 V =4 V
.
DS
0
3 2 0
µ
s P l e T s
. 5
us et
4
6
8
1
0
1
-1
0
1
1
0
1
-1
0
0
2
V , Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
4
Fig 3. On-Resistance vs. Drain Current
I
DR
, Reverse Drain Current [A]
1
1
0
Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance
3
V =5V
GS
R
DS(on)
, [
Ω
]
2
1
0
0
1
@ N t : T = 2
o
C
oe
J
5
8
1
0
1 0
o
C
5
2
o
C
5
1
-1
0
04
.
06
.
SD
@Nts:
oe
1 V =0V
.
GS
2 2 0
µ
s P l e T s
. 5
us et
08
.
10
.
12
.
14
.
V =1 V
0
GS
0
0
2
D
4
6
I , Drain Current [A]
V , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
30
0
C = C + C (C = s o t d )
iss gs gd
ds
h r e
C =C +C
oss ds gd
C =C
rss gd
6
Fig 6. Gate Charge vs. Gate-Source Voltage
20
4
V
GS
, Gate-Source Voltage [V]
C
iss
V =4 V
0
DS
V =0 V
10
DS
4
V =10V
6
DS
Capacitance [pF]
10
8
10
2
C
oss
@Nts:
oe
1 V =0V
.
GS
2 f=1Mz
.
H
2
6
0
C
rss
@Nts:I =33A
oe
.
D
0
0
G
0
0
1
0
1
1
0
2
4
6
V
DS
, Drain-Source Voltage [V]
Q , Total Gate Charge [nC]
3
IRLR/U210A
Fig 7. Breakdown Voltage vs. Temperature
12
.
25
.
1&+$11(/
32:(5 026)(7
Fig 8. On-Resistance vs. Temperature
Drain-Source Breakdown Voltage
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
20
.
BV
DSS
, (Normalized)
11
.
15
.
10
.
10
.
@ Nt s:
oe
1 V =5 V
.
GS
2 I =1 6 A
.
D
.5
-0
5
-5
2
0
2
5
5
0
7
5
10
0
o
09
.
@ Nt s:
oe
1 V =0 V
.
GS
2 I = 2 0
µ
A
.
D
5
05
.
08
.
-5
7
-0
5
-5
2
J
0
2
5
5
0
7
5
10
0
o
15
2
10
5
15
7
00
.
-5
7
15
2
10
5
15
7
T , Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
O ea in i Ti Ae
pr to n hs r a
i L m t d b R
DS(on)
s i ie y
Fig 10. Max. Drain Current vs. Ambient Temperature
10
.
I
D
, Drain Current [A]
1
1
0
I
D
, Drain Current [A]
08
.
1 0
µ
s
0
1
0
0
1m
s
1 m
0 s
D
C
@ Nt s:
oe
1 T = 2
o
C
.
C
5
1
-2
0
2 T = 1 0
o
C
.
J
5
3 Sn l P le
. ig e us
06
.
1
-1
0
04
.
02
.
1
-3 -1
0
1
0
1
0
0
1
1
0
1
2
0
00
.
2
5
5
0
7
5
10
0
15
2
10
5
V
DS
, Drain-Source Voltage [V]
T
A
, Ambient Temperature [
o
C]
Thermal Response
10
2
D=0.5
0.2
10
1
0.1
0.05
0.02
10
0
Fig 11. Thermal Response
@ Notes :
1. Z
J A
(t)=69.4
o
C/W Max.
θ
2. Duty Factor, D=t
1
/t
2
3. T
J M
-T
A
=P
D M
*Z
P
DM
θ
JA
(t)
Z (t) ,
0.01
single pulse
θ
JA
t
1
t
2
10
- 1 - 5
10
10
- 4
10
- 3
1
10
- 2
10
- 1
10
0
10
1
10
2
10
3
t
, Square Wave Pulse Duration
[sec]
4
1&+$11(/
32:(5 026)(7
IRLR/U210A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
50kΩ
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
5V
V
DS
V
GS
DUT
3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
V
in
5V
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
10%
V
out
V
DD
( 0.5 rated V
DS
)
90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
E
AS
= ---- L
L
I
AS2
--------------------
2
BV
DSS
-- V
DD
BV
DSS
I
AS
C
V
DD
V
DD
t
p
I
D
R
G
DUT
5V
t
p
I
D
(t)
V
DS
(t)
Time
5
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