power ARM7 core as well as a myriad of precision analog
functions. The onboard multiplexer, digitally programmable
gain amplifier (PGA), voltage reference, programmable current
sources, and 24-bit sigma-delta ADC allow almost any temper-
ature and bridge sensors to be directly connected. In this case, a
4-wire Pt100 (100 Ω platinum RTD) temperature sensor was
chosen. Further details on the measuring circuit can be found
in the
AN-0970 Application Note.
The wireless band chosen for this application is the sub-GHz,
license-free ISM (industrial, scientific, medical) band. The
ADF7020
transceiver, which supports bands in the 431 MHz to
478 MHz as well as the 862 MHz to 956 MHz frequency ranges,
is, therefore, a natural choice. This low power transceiver
requires very few external components, is easily connected to
the
ADuC7060
precision analog microcontroller, and offers
excellent performance.
The
ADP121
voltage regulator provides the 2.5 V supply from
two 1.5 V batteries. The very low quiescent current of this
voltage regulator (11µA at no load) is paramount in maxi-
mizing battery lifetime.
Circuit Note
The first factor is addressed by choosing low power components
such as the
ADuC7060
and the
ADF7020.
The second factor,
minimizing the activity of the system, is achieved by keeping
the system inactive as long as possible. It is worth considering
the tradeoff between integer versus floating point arithmetic—
in many cases, integer is sufficient, has a shorter execution time,
and, thus, provides greater savings. The final factor, reducing air
time, is achieved in part by using a protocol with minimum
overhead, but also to a large extent by using the
ADF7020,
which has very high receiver sensitivity and good out-of-band
rejection, thus maximizing the probability that the data package
contains correct data.
Code Description—General
The system spends the majority of time in deep sleep mode,
with a current consumption of 50 µA to 60 µA (depending on
ambient temperature). Timer 2 wakes the system every second.
Every 60 seconds, an ADC measurement is executed, linearized,
and transmitted. Timer 2 can wake the system from deep sleep;
the other three timers cannot. Timer 2 is 16-bit, meaning that it
wakes every second when running from a 32 kHz clock (in sleep
mode). After the ADC is started, the system goes into pause
mode (see the
ADuC7060
data sheet for more information). This
is a reduced power mode, albeit not as reduced as deep sleep.
The ADC wakes the system when finished. A temperature value
is calculated from the ADC results and is packaged and
transmitted.
Packaging essentially means placing appropriate data in a
buffer. In this case, the data consists of a 4-byte floating point
temperature value and a 2-byte CRC (cyclic redundancy check).
In a more complex system, a header with node address, received
signal strength, and other information precedes this data.
Before sending this buffer to the
ADF7020
transceiver, an
8-byte preamb to help synchronize the receiving node and a
3-byte synchronization word, or sync word, are sent. This is a
unique 3-byte number that is checked for a match at the receiver
node before a package can be received.
The hardware is very similar on the receiving side; an
ADF7020
transceiver is configured to listen for the unique sync word.
After the sync word is received, the data package follows. The
data is sent to the PC via the UART.
Flowcharts for the main loops of both the measurement node
and the base receiving node are displayed in Figure 2.
Source code for this circuit can be found at this address:
www.analog.com/CN0164_Source_Code.
CIRCUIT DESCRIPTION
Two buses connect the
ADF7020
ISM transceiver with the
ADuC7060
precision microcontroller. Both buses are serial and
bidirectional. One of these buses configures the transceiver, and
it requires four microprocessor ports. The second bus is the
data bus, which enables the data transaction between controller
and transceiver. This bus requires at least three microprocessor
ports. In this particular application, two ports are used instead
of one bidirectional port with two interrupts. This simplifies the
software but necessitates the use of an extra diode and resistor
to separate incoming and outgoing data streams. A parallel
combination of two Schottky diodes ensures a logic low, which
is less than 200 mV. The BAT54C has two diodes in the same
package (connecting Pin 1 and Pin 2 together for a parallel
configuration). All digital ports on the
ADuC7060
have
programmable pull-up resistors; however, an external pull-up
resistor is also required. With a data rate of 10 kbps, a 4.7 kΩ
resistor works well.
Three factors determine the overall current drawn by the
circuit: the requirement of the individual components in both
sleep and active modes), the amount of time the system is
active, and the amount of time the transceiver itself is active.
Rev. A | Page 2 of 5
Circuit Note
START
CN-0164
START
1MIN?
NO
50µA
START ADC
INTERRUPT
N
FROM
ADF7020?
NO
200µA
ADC
FINISHED?
NO
AIR DATA LINK
READ ADC
NO
READ ADF7020
DATA
PACKAGE
RECEIVED?
LINEARIZE
25mA
PUT DATA IN SERIAL
BUFFER
TRANSMIT
VALUE
SEND DATA
TO PC
09100-002
MEASURING NODE
MAIN LOOP
RECEIVING NODE
MAIN LOOP
Figure 2. Measuring and Receiving Node Main Loop Flowcharts
Code Description—ADF7020 Driver
There are many modulation schemes supported by the
ADF7020.
In this case, the GFSK (gaussian frequency shift
keying) is used. This has the benefit of having very good
spectral efficiency. In this mode, the
ADF7020
generates the
data clock both when transmitting and receiving. The rising
edge of this clock (DATA CLK) generates an interrupt, which
causes the
ADuC7060
to place the data on the output port, bit-
by-bit as shown in Figure 3. When all the data has been
clocked-out, the chip select is deasserted, and the
ADuC7060
reenters deep sleep mode.
On the receiving side, the
ADF7020
generates an interrupt
when a matching sync word is received (Port INT/LOCK goes
high for nine clock cycles)
This informs the
ADuC7060
processor to prepare for the
reception of a package. Each bit that is received from the
package causes an interrupt in the
ADuC7060.
In the interrupt
service routine (ISR), the bit stream is read and stored in a
buffer. When all the bytes in the package have been received, a
flag is set to indicate that a new package has been received. The
main loop can now ensure the validity of the package by the
checksum. A correct and complete package can be processed. In
this case, this information is sent via the UART to the PC for
display. The same ISR handles both the sending and receiving of
data to/from the ADF7020 transceiver, as shown in Figure 4.
Source code for this circuit can be found at this address:
www.analog.com/CN0164_Source_Code.
Rev. A | Page 3 of 5
CN-0164
INTERRUPT FROM ADF7020 TO ADuC7060 IRQ2
INT/LOCK
9 CLOCK CYCLES
PACKAGE RECEIVED
INTERRUPTS FROM ADF7020 TO ADuC7060 IRQ3
Circuit Note
DATA CLK
DATA I/O
09100-003
09100-004
DATA PACKAGE (4 BYTES)
CRC (2 BYTES)
Figure 3. Data I/O Timing
ADF7020 INTERRUPT
Rx
Rx or Tx?
Tx
BIT_CNTR < 7
BIT_CNTR < 7
BIT_CNTR = 0
BIT_CNTR = 0
YES
YES
STORE BYTE
CLOCK-OUT BIT
TO ADF7020
INC. BIT_CNTR
END OF
PACKAGE?
NO
CLOCK-IN BIT
FROM ADF7020
SET PACKAGE
Rx FLAG
INC. BIT_CNTR
ALL BYTES
SENT?
YES
DISABLE INTERRUPT
EXIT INTERRUPT
Figure 4. Interrupt Service Routines for Handling Rx and Tx Data
Rev. A | Page 4 of 5
Circuit Note
COMMON VARIATIONS
Depending on the desired frequency, there are a number of
other products that can be used instead of the
ADF7020.
For
example, for the 2.4 GHz frequency band, the
ADF7242
is a
very good choice.
CN-0164
Data Sheets and Evaluation Boards
ADF7020 Data Sheet
ADF7020 Evaluation Board
ADF7020 Device Drivers
ADuC7060 Data Sheet
ADuC7060 Evaluation System
ADP121 Data Sheet
LEARN MORE
Source code for CN-0164
Looney, Mike. AN-0970 Application Note.
RTD Interfacing and
Linearization Using an ADuC706x Microcontroller,
Analog
Devices.
REVISION HISTORY
2/11—Rev. 0 to Rev. A
Change to Circuit Function and Benefits ...................................... 1
10/10—Revision 0: Initial Version
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