PSMN7R6-100BSE
18 December 2012
N-channel 100 V 7.6 mΩ standard level MOSFET in D2PAK
Product data sheet
1. General description
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. Part of
NXP's "NextPower Live" portfolio, the PSMN7R6-100BSE complements the latest "hot-
swap" controllers - robust enough to withstand substantial inrush currents during turn on,
whilst offering a low R
DS(on)
characteristic to keep temperatures down and efficiency up in
continued use. Ideal for telecommunication systems based on a 48 V backplane / supply
rail.
2. Features and benefits
•
•
Enhanced forward biased safe operating area for superior linear mode operation
Very low R
DS(on)
for low conduction losses
3. Applications
•
•
•
•
Electronic fuse
Hot swap
Load switch
Soft start
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
T
mb
= 100 °C; V
GS
= 10 V;
Fig. 1
T
mb
= 25 °C;
Fig. 2
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 12
V
GS
= 10 V; I
D
= 25 A; V
DS
= 50 V;
Fig. 14; Fig. 15
-
-
41
128
-
-
nC
nC
[1]
Min
-
-
-
Typ
-
-
-
Max
100
75
296
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
-
6.5
7.6
mΩ
Dynamic characteristics
Q
GD
Q
G(tot)
gate-drain charge
total gate charge
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NXP Semiconductors
PSMN7R6-100BSE
N-channel 100 V 7.6 mΩ standard level MOSFET in D2PAK
Symbol
E
DS(AL)S
Parameter
non-repetitive drain-
source avalanche
energy
[1]
Conditions
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 75 A;
V
sup
≤ 100 V; R
GS
= 50 Ω; unclamped;
Fig. 3
Min
-
Typ
-
Max
426
Unit
mJ
Avalanche Ruggedness
Continuous current limited by package
5. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
G
mbb076
Simplified outline
mb
Graphic symbol
D
S
D2PAK (SOT404)
[1]
It is not possible to make connection to pin 2
6. Ordering information
Table 3.
Ordering information
Package
Name
PSMN7R6-100BSE
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
Type number
7. Marking
Table 4.
Marking codes
Marking code
PSMN7R6100BSE
Type number
PSMN7R6-100BSE
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
PSMN7R6-100BSE
Parameter
drain-source voltage
drain-gate voltage
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
T
j
≥ 25 °C; T
j
≤ 175 °C; R
GS
= 20 kΩ
All information provided in this document is subject to legal disclaimers.
Min
-
-
Max
100
100
Unit
V
V
2 / 13
© NXP B.V. 2012. All rights reserved
Product data sheet
18 December 2012
NXP Semiconductors
PSMN7R6-100BSE
N-channel 100 V 7.6 mΩ standard level MOSFET in D2PAK
Symbol
V
GS
I
D
Parameter
gate-source voltage
drain current
Conditions
V
GS
= 10 V; T
j
= 25 °C;
Fig. 1
V
GS
= 10 V; T
mb
= 100 °C;
Fig. 1
Min
-20
[1]
[1]
Max
20
75
75
481
296
175
175
260
Unit
V
A
A
A
W
°C
°C
°C
-
-
-
-
-55
-55
-
I
DM
P
tot
T
stg
T
j
T
sld(M)
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C;
Fig. 4
T
mb
= 25 °C;
Fig. 2
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 75 A;
V
sup
≤ 100 V; R
GS
= 50 Ω; unclamped;
Fig. 3
[1]
150
[1]
-
-
75
481
A
A
Avalanche Ruggedness
non-repetitive drain-source
avalanche energy
-
426
mJ
Continuous current limited by package
003aak744
I
D
(A)
125
100
75
50
25
0
120
P
der
(%)
80
03aa16
(1)
(1)
40
0
30
60
90
120
150
T
j
(°C)
180
0
0
50
100
150
T
mb
(°C)
200
(1) Capped at 75A due to package
Fig. 1.
Continuous drain current as a function of
mounting base temperature
Fig. 2.
Normalized total power dissipation as a
function of mounting base temperature
PSMN7R6-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
18 December 2012
3 / 13
NXP Semiconductors
PSMN7R6-100BSE
N-channel 100 V 7.6 mΩ standard level MOSFET in D2PAK
I
AL
(A)
10
2
(1)
003aak745
(2)
10
1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig. 3.
Single pulse avalanche rating; avalanche current as a function of avalanche time
I
D
(A)
10
3
Limit R
DSon
= V
DS
/ I
D
10
2
t
p
= 10 us
100 us
10
DC
1 ms
10 ms
100 ms
003aak746
1
10
-1
1
10
10
2
V
DS
(V)
10
3
Fig. 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
Conditions
Fig. 5
Min
-
Typ
0.42
Max
0.51
Unit
K/W
R
th(j-a)
Minimum footprint; mounted on a
printed circuit board
-
50
-
K/W
PSMN7R6-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
18 December 2012
4 / 13
NXP Semiconductors
PSMN7R6-100BSE
N-channel 100 V 7.6 mΩ standard level MOSFET in D2PAK
Z
th(j-mb)
(K/W)
1
003aak747
δ = 0.5
10
-1
0.2
0.1
0.05
10
-2
0.02
single shot
P
δ=
t
p
T
t
p
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
T
t
p
(s)
1
Fig. 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 10; Fig. 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 11
I
DSS
drain leakage current
V
DS
= 100 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 100 V; V
GS
= 0 V; T
j
= 175 °C
I
GSS
gate leakage current
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 12
V
GS
= 10 V; I
D
= 25 A; T
j
= 100 °C;
Fig. 12; Fig. 13
V
GS
= 10 V; I
D
= 25 A; T
j
= 175 °C;
Fig. 12; Fig. 13
R
G
gate resistance
f = 1 MHz
0.42
0.83
1.66
Ω
-
-
20.5
mΩ
-
-
13.7
mΩ
-
-
-
-
-
0.1
-
10
10
6.5
2
500
100
100
7.6
µA
µA
nA
nA
mΩ
-
-
4.6
V
1
-
-
V
Min
100
90
2
Typ
-
-
3
Max
-
-
4
Unit
V
V
V
Static characteristics
V
GS(th)
V
GSth
PSMN7R6-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
18 December 2012
5 / 13
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