CMOS STATIC RAM
16K (4K x 4-BIT)
Integrated Device Technology, Inc.
IDT6168SA
IDT6168LA
FEATURES:
• High-speed (equal access and cycle time)
— Military: 15/20/25/35/45ns (max.)
— Commercial: 15/20/25/35ns (max.)
• Low power consumption
• Battery backup operation—2V data retention voltage
(IDT6168LA only)
• Available in high-density 20-pin ceramic or plastic DIP, 20-
pin SOIC.
• Produced with advanced CMOS high-performance
technology
• CMOS process virtually eliminates alpha particle soft-error
rates
• Bidirectional data input and output
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT6168 is a 16,384-bit high-speed static RAM orga-
nized as 4K x 4. It is fabricated using lDT’s high-performance,
high-reliability CMOS technology. This state-of-the-art tech-
nology, combined with innovative circuit design techniques,
provides a cost-effective approach for high-speed memory
applications.
Access times as fast 15ns are available. The circuit also
offers a reduced power standby mode. When
CS
goes HIGH,
the circuit will automatically go to, and remain in, a standby
mode as long as
CS
remains HIGH. This capability provides
significant system-level power and cooling savings. The low-
power (LA) version also offers a battery backup data retention
capability where the circuit typically consumes only 1µW
operating off a 2V battery. All inputs and outputs of the
IDT6168 are TTL-compatible and operate from a single 5V
supply.
The IDT6168 is packaged in either a space saving 20-pin,
300-mil ceramic or plastic DIP, 20-pin SOIC providing high
board-level packing densities.
Military grade product is manufactured in compliance with
the latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A
0
V
CC
GND
ADDRESS
DECODER
16,384-BIT
MEMORY ARRAY
A
11
I/O
0
I/O
1
I/O
2
I/O
3
I/O CONTROL
INPUT
DATA
CONTROL
CS
WE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
3090 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGE
©1996
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
MAY 1996
3090/2
5.3
1
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
TRUTH TABLE
(1)
Mode
Standby
CS
H
L
L
WE
X
H
L
Output
High-Z
D
OUT
D
IN
Power
Standby
Active
Active
3090 tbl 03
A
0
A
1
A
2
A
3
A
4
A
5
A
6
1
2
3
4
5
6
7
8
9
10
20
19
18
V
CC
A
11
A
10
A
9
A
8
I/O
3
I/O
2
I/O
1
I/O
0
Read
Write
P20-1,
D20-1,
&
SO20-2
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't Care
17
16
15
14
13
12
11
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
Rating
Com’l.
Mil.
–0.5 to +7.0
Unit
V
Terminal Voltage –0.5 to +7.0
with Respect
to GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
Power Dissipation
DC Output
Current
0 to +70
–55 to +125
–55 to +125
1.0
50
CS
GND
A
7
WE
3090 drw 02
T
A
T
BIAS
T
STG
P
T
I
OUT
–55 to +125
–65 to +135
–65 to +150
1.0
50
°C
°C
°C
W
mA
DIP/SOJ
TOP VIEW
PIN DESCRIPTIONS
Name
A
0
–A
11
Description
Address Inputs
Chip Select
Write Enable
Data Input/Output
Power
Ground
3090 tbl 01
NOTE:
3090 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CS
WE
I/O
0-3
V
CC
GND
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min. Typ.
4.5
5.0
0
0
2.2
—
–0.5
(1)
—
Max.
5.5
0
6.0
0.8
Unit
V
V
V
V
CAPACITANCE
(T
A
= +25°C, F = 1.0MH
Z
)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
7
7
Unit
pF
pF
NOTE:
3090 tbl 05
1. V
IL
(min.) = –3.0V for pulse width less than 20ns, once per cycle.
NOTE:
3090 tbl 02
1. This parameter is determined by device characterization, but is not
production tested.
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Military
Commercial
Temperature
–55°C to +125°C
0°C to +70°C
GND
0V
0V
VCC
5V
±
10%
5V
±
10%
3090 tbl 06
5.3
2
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(1)
(V
CC
= 5.0V
±
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
6168SA15
Symbol
I
CC1
Parameter
Operating Power Supply Current
CS
≤
V
IL
, Outputs Open,
V
CC
= Max., f = 0
(2)
Dynamic Operating Current
CS
≤
V
IL
, Outputs Open,
V
CC
= Max., f = f
MAX
(2)
Standby Power Supply Current
(TTL Level)
CS
≥
V
IH
, V
CC
= Max.,
Outputs Open, f = f
MAX
(2)
Full Standby Power Supply Current
(CMOS Level)
CS
≥
V
HC
, V
CC
= Max.,
V
IN
≥
V
HC
or V
IN
≤
V
LC
, f = 0
(2)
Power Com’l. Mil.
SA
LA
SA
LA
SA
LA
SA
LA
110
—
145
—
55
—
20
—
120
—
165
—
60
—
20
—
6168SA20
6168LA20
Com’l.
90
70
120
100
45
30
20
0.5
Mil.
100
80
120
110
45
35
20
5
3090 tbl 07
Unit
mA
I
CC2
mA
I
SB
mA
I
SB1
mA
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
(1)
(V
CC
= 5.0V
±
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
6168SA25
6168LA25
Symbol
I
CC1
Parameter
Operating Power Supply Current
CS
≤
V
IL
, Outputs Open,
V
CC
= Max., f = 0
(2)
Dynamic Operating Current
CS
≤
V
IL
, Outputs Open,
V
CC
= Max., f = f
MAX
(2)
Standby Power Supply Current
(TTL Level)
CS
≥
V
IH
, V
CC
= Max.,
Outputs Open, f = f
MAX
(2)
Full Standby Power Supply Current
(CMOS Level)
CS
≥
V
HC
, V
CC
= Max.,
V
IN
≥
V
HC
or V
IN
≤
V
LC
, f = 0
(2)
Power Com’l.
SA
LA
SA
LA
SA
LA
SA
LA
90
70
110
90
35
25
3
0.5
Mil.
100
80
120
100
45
30
10
0.3
6168SA35
6168LA35
Com’l.
90
70
100
80
30
20
3
0.5
Mil.
—
—
—
—
—
—
—
—
6168SA45
6168LA45
Com’l.
—
—
—
—
—
—
—
—
Mil.
100
80
110
80
35
25
10
0.3
3090 tbl 08
Unit
mA
I
CC2
mA
I
SB
mA
I
SB1
mA
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
, only address inputs are cycling at f
MAX
. f = 0 means no address inputs are changing.
DC ELECTRICAL CHARACTERISTICS
V
CC
= 5.0V
±
10%
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
Test Condition
V
CC
= Max.,
V
IN
= GND to V
CC
MIL
COM’L
MIL
COM’L
IDT6168SA
Min.
Max.
—
—
—
—
—
—
2.4
10
2
10
2
0.5
0.4
—
IDT6168LA
Min.
Max.
—
—
—
—
—
—
2.4
5
2
5
2
0.5
0.4
—
V
3090 tbl 09
Unit
µA
µA
V
Output Leakage Current V
CC
= Max.,
CS
= V
IH
,
V
OUT
= GND to V
CC
Output LOW Voltage
Output HIGH Voltage
I
OL
= 10mA, V
CC
= Min.
I
O
L = 8mA, V
CC
= Min.
I
OH
= –4mA, V
CC
= Min.
5.3
3
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS
(LA Version Only)
V
LC
= 0.2V, V
HC
= V
CC
– 0.2V
Symbol
V
DR
I
CCDR
Parameter
V
CC
for Data Retention
Data Retention Current
Test Condition
MIL.
COM’L.
Min.
2.0
—
—
—
—
0
t
RC
(2)
IDT6168LA
Typ.
(1)
—
0.5
(2)
1.0
(3)
0.5
(2)
1.0
(3)
—
—
Max.
—
100
(2)
150
(3)
20
(2)
30
(3)
—
—
Unit
V
µA
µA
ns
ns
3090 tbl 10
CS
≥
V
HC
V
IN
≥
V
HC
or
≤
V
LC
t
CDR
(5)
t
R
(5)
Chip Deselect to Data
Retention Time
Operation Recovery Time
NOTES:
1. T
A
= +25°C.
2. at V
CC
= 2V
3. at V
CC
= 3V
4. t
RC
= Read Cycle Time.
5. This parameter is guaranteed by device characterization, but is not production tested.
LOW V
CC
DATA RETENTION WAVEFORM
DATA
RETENTION
MODE
V
CC
t
CDR
4.5V
V
DR
≥
2V
V
IH
V
DR
V
IH
3090 drw 03
4.5V
t
R
CS
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
3090 tbl 11
5V
5V
480Ω
DATA
OUT
255Ω
30pF*
480Ω
DATA
OUT
255Ω
5pF*
3090 drw 04
3090 drw 05
Figure 1. AC Test Load
*Includes scope and jig capacitances
Figure 2. AC Test Load
(for t
CHZ
, t
CLZ
, t
WHZ
and t
OW
)
5.3
4
IDT6168SA/LA
CMOS STATIC RAM 16K (4K x 4-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
(V
CC
= 5.0V
±
10%, All Temperature Ranges)
6168SA15
6168SA20/25
6168LA20/25
6168SA35
6168LA35
6168SA45
(1)
6168LA45
(1)
Symbol
Read Cycle
t
RC
t
AA
t
ACS
t
CLZ
(2)
t
CHZ
(2)
t
OH
t
PU
(2)
t
PD
(2)
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
Min.
15
—
—
3
—
3
0
—
Max.
—
15
15
—
8
—
—
35
Min.
20/25
—
—
5
—
3
0
—
Max.
—
20/25
20/25
—
10
—
—
20/25
Min.
35
—
—
5
—
3
0
—
Max.
—
35
35
—
15
—
—
35
Min.
45
—
—
5
—
3
0
—
Max.
—
45
45
—
25
—
—
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
3090 tbl 12
NOTES:
1. –55°C to +125°C temperature range only.
2. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
TIMING WAVEFORM OF READ CYCLE NO. 1
(1, 2)
t
RC
ADDRESS
t
AA
t
OH
DATA
OUT
PREVIOUS DATA VALID
DATA VALID
3090 drw 06
TIMING WAVEFORM OF READ CYCLE NO. 2
(1, 3)
t
RC
CS
t
CLZ
DATA
OUT
(4)
t
ACS
t
CHZ
DATA
OUT
VALID
(3)
HIGH IMPEDANCE
t
PU
HIGH IMPEDANCE
V
CC
SUPPLY
CURRENT
I
CC
I
SB
t
PD
3090 drw 07
NOTES:
1.
WE
is HIGH for Read cycle.
2.
CS
is LOW for Read cycle.
3. Device is continuously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4. Transition is measured
±200mV
from steady state.
5.3
5
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