NCV7424
Four Channel LIN
Transceiver
NCV7424 is a four channel physical layer device using the Local
Interconnect Network (LIN) protocol. It allows interfacing of four
independent LIN physical buses and the LIN protocol controllers. The
device is compliant to LIN 2.x Protocol Specification package and the
SAE J2602 standard.
The NCV7424 LIN device is a member of the in-vehicle networking
(IVN) transceiver family. The device is a monolithic solution
incorporating 4 times the NCV7321-1 transceiver.
It is designed to work in a harsh automotive environment and is
qualified following the TS16949 flow.
Features
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1
TSSOP−16
CASE 948F
•
TSSOP16 Package. Pin-out Compatible with One Single LIN
•
•
•
•
•
•
•
•
•
•
•
•
NCV7321 Transceiver (Pin Numbers 4 to 7, and 10 to 13)
Compliant with LIN2.x, Backwards Compatible to Version 1.3 and
J2602
Transmission Rate 1 kbps to 20 kbps
Indefinite Short-Circuit Protection on LIN towards Supply and
Ground
Bus Pins Protected Against Transients in an Automotive
Environment
Thermal Shutdown
System ESD on LIN Pin Exceeding 10 kV, No Need for External
ESD Protections
Load Dump Protection (45 V)
Integrated Slope Control Resulting into Excellent EME Performance
also without any Capacitor on LIN Pin
Excellent EMI Performance
Remote Wake-up via LIN Bus on all Four Channels
3.3 V and 5 V Compatible Digital Inputs
These are Pb-Free Devices
PACKAGE PICTURE
NCV7424
TxD4
RxD3
TxD3
RxD1
EN
TxD2
TxD1
RxD2
1
TSSOP−16
16
8
9
RxD4
LIN4
GND
LIN3
V
BB
LIN1
GND
LIN2
MARKING DIAGRAM
16
NV74
24−0
ALYWG
G
1
NV7424−0 = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 11 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
August, 2013
−
Rev. 0
1
Publication Order Number:
NCV7424/D
NCV7424
BLOCK DIAGRAM
NCV7424
Undervoltage
POR
V
BB
VINT
EN
State
&
Wake−up
Control
Timeouts
Osc
Thermal
Shutdown
GND
GND
RxD1
COMP
Vint
Filter
LIN1
TxD1
Driver
Control
Slope
Control
Channel1
RxD2
TxD2
RxD3
TxD3
RxD4
TxD4
RB20111020.1
Channel2
LIN2
Channel3
LIN3
Channel4
LIN4
Figure 1. Block Diagram
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NCV7424
Table 1. KEY TECHNICAL CHARACTERISTICS AND OPERATING RANGES
Symbol
V
BB
I
BB
_SLP
V
LIN
V_Dig_IO
T
J
T
amb
V
ESD
Parameter
Nominal Battery Operating Voltage (Note 1)
Load Dump Protection
Supply Current in Sleep Mode, V
BB
= 12 V, T
J
< 85°C V
LINx
= V
BB
LIN Bus Voltage
Operating DC Voltage on Digital IO Pins (EN, RxD1-4, TxD1-4)
Junction Thermal Shutdown Temperature
Operating Ambient Temperature
Electrostatic Discharge Voltage (all pins) Human Body Model (Note 2)
Conform to EIA−JESD22−A114−B
Electrostatic Discharge Voltage (LIN) System Human Body Model (Note 3)
Conform to EIC 61000−4−2
−45
0
150
−40
−4
−10
165
10
Min
5
Typ
12
Max
27
45
30
45
5.5
185
125
4
10
mA
V
V
°C
°C
kV
kV
Unit
V
1. Below 5 V on V
BB
in normal mode, the bus will either stay recessive or comply with the voltage level specifications and transition time
specifications as required by SAE J2602. It is ensured by the battery monitoring circuit. Above 27 V on V
BB
, LIN communication is operational
(LIN pin toggling) but parameters cannot be guaranteed. For higher battery voltage operation above 27 V, LIN pull-up resistor must be
selected large enough to avoid clamping of LIN pin by voltage drop over external pull-up resistor and LIN pin min current limitation.
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor.
3. Equivalent to discharging a 150 pF capacitor through a 330
W
resistor. System HBM levels are verified by an external test−house.
Table 2. PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
TxD4
RxD3
TxD3
RxD1
EN
TxD2
TxD1
RxD2
LIN2
GND
LIN1
V
BB
LIN3
GND
LIN4
RxD4
Description
Transmit Data Input, Low for Dominant State; Pull-up to internal supply guaranteed above pin input threshold
Receive Data Output; Low in Dominant State
Transmit Data Input, Low for Dominant State; Pull-up to internal supply guaranteed above pin input threshold
Receive Data Output; Low in Dominant State
Enable Input, Transceiver in Normal Operation Mode when High, Pull-down Resistor to GND
Transmit Data Input, Low for Dominant State; Pull-up to internal supply guaranteed above pin input threshold
Transmit Data Input, Low for Dominant State; Pull-up to internal supply guaranteed above pin input threshold
Receive Data Output; Low in Dominant State
LIN Bus Output/Input
Ground
LIN Bus Output/Input
Battery Supply Input
LIN Bus Output/Input
Ground
LIN Bus Output/Input
Receive Data Output; Low in Dominant State
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NCV7424
TYPICAL APPLICATION
VBAT
V
BB
VCC
2.7 V to
5V
4
5.1k
1k
4
V
BB
RxDx
4
4
LINx
TxDx
EN
4
LINx
4
Micro
controller
NCV7424
GND
GND
1nF
GND
GND
RB 20111103
4
KL30
LIN BUS
1,2,3,4
KL31
Figure 2. Application Diagram, Four LIN Master Nodes
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
V
BB
V
LINx
V_Dig_IO
T
J
V
ESD
Voltage on Pin V
BB
LINx Bus Voltage (LIN1-4)
DC Input Voltage on Pins (EN, RxD1-4, TxD1-4)
Maximum Junction Temperature
HBM (All Pins) (Note 4)
Conform to EIA−JESD22−A114−B
CDM (All Pins)
According to ESD STM 5.3.1−1999
HBM (LINx and V
BB
) (Note 4)
System HBM (LINx and V
BB
) (Note 5)
Conform to EIC 61000−4−2
Parameter
Min
−0.3
−45
−0.3
−40
−4
−750
−8
−10
Typ
Max
45
45
6
150
4
750
8
10
Unit
V
V
V
°C
kV
V
kV
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
4. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor.
5. Equivalent to discharging a 150 pF capacitor through a 330
W
resistor. System HBM levels are verified by an external test−house.
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NCV7424
Table 4. THERMAL CHARACTERISTICS
Symbol
R
qJA_1
R
qJA_2
Parameter
Thermal Resistance Junction−to−Air, JESD51-3 1S0P PCB
Thermal Resistance Junction−to−Air, JESD51-7 2S2P PCB
Conditions
Free air
Free air
Value
128
72
Unit
K/W
K/W
FUNCTIONAL DESCRIPTION
Overall Functional Description
LIN is a serial communication protocol that efficiently
supports the control of mechatronic nodes in distributed
automotive applications. The domain is class-A multiplex
buses with a single master node and a set of slave nodes.
The NCV7424 contains four independent LIN
transmitters, LIN receivers plus common battery
monitoring, power-on-reset (POR) circuits and thermal
shutdown (TSD). The used LIN transmitter is optimized for
the maximum specified transmission speed of 20 kbps with
excellent EMC performance due to reduced slew rate of the
LIN outputs.
The junction temperature is monitored via a thermal
shutdown circuit that switches the LIN transmitters off when
temperature exceeds the TSD trigger level.
The NCV7424 has four operating states (unpowered
mode, standby mode, normal mode and sleep mode) that are
determined by the supply voltage V
BB
, input signals EN and
activity on the LIN bus. The operating states and principal
transitions between them are depicted in Figure 3.
OPERATING STATES
Standby mode
−
LIN Transceivers: OFF
−
LIN Term: 30 kW
−
RxD1, 2, 3, 4:
Low to indicate wake−up on
bus / floating otherwise
Normal mode
EN = High for t > t
enable
−
LIN Transceivers: ON
−
LIN Term: 30 kW
−
RxD1, 2, 3, 4:
Received LIN Data
LIN1, 2, 3 or 4 wakeup
EN = Low for t > t
disable
EN = High for t > t
enable
Unpowered
(V
BB
Below Reset Level)
−
LIN Transceivers: OFF
−
LIN Term: Floating
−
RxD1, 2, 3, 4: Floating
V
BB
Above Reset Level
Sleep Mode
−
LIN Transceivers: OFF
−
LIN Term: Current Source
−
RxD1, 2, 3, 4: Floating
Figure 3. State Diagram
Unpowered Mode
As long as V
BB
remains below its power-on-reset level,
the chip is kept in a safe unpowered state. LIN transmitters
are inactive, LINx pins are left floating. Pins RxDx remain
floating.
The unpowered state will be entered from any other state
when V
BB
falls below its power-on-reset level.
Standby Mode
sleep mode, the RxD1,2,3 or 4 pin is pulled low depending
on which of the respective pins LIN1,2,3 or 4 the valid LIN
wake-up occurred. While staying in standby mode, wake-up
signaling by RxDx pins on each LIN channel is fully
functional. This is also in case if wake event(s) started in
sleep mode but actual transition from sleep to standby was
caused by preceding wake-up event on other LIN channel.
Normal Mode
Standby mode is a low-power mode, where the LIN
transceivers remain inactive. A 30 kW resistor in series with
a reverse-protection diode is internally connected between
individual LIN pins and pin V
BB
. Standby mode is entered
after a wake-up event is recognized while the chip was in the
In normal mode, the full functionality of the LIN
transceivers is available. Data are sent to the LINx bus
according to the state of TxDx inputs and RxDx pins reflect
the logical symbol received on the LINx bus –
high-impedant for recessive and Low level for dominant.
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