AS8F1M32
1M x 32 FLASH
FLASH MEMORY MODULE
AVAILABLE AS MILITARY
SPECIFICATIONS
• Military Processing (MIL-PRF-38534, para 1.2)
•
Temperature Range -55
o
C to 125
o
C
FLASH
FIGURE 1: PIN ASSIGNMENT
(Top View)
68 Lead CQFP
RESET\
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
VCC
08
07
06
05
02
01
67
65
09
04
03
68
66
64
63
62
I/O0
I/O1
I/02
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/012
I/O13
I/O14
I/O15
61
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
78
57
76
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
FEATURES
• Fast access times of 90ns, 120ns, and 150ns
• 5.0V ±10%, single power supply operation
• Low power consumption typical: 4μA typical CMOS stand-by
* ICC(active) <120mA for READ/WRITE
• 20 year DATA RETENTION at 125
o
C
• 1,000,000 program/erase cycles
• 16 equal sectors of 64 Kbytes each
• Any combination of sectors can be erased
• Group sector protection
• Supports FULL chip erase
• Compatible with JEDEC standards
• Embedded erase and program algorithms
• Data\ polling and toggle bits for detection of program or erase
cycle completion.
• Erase suspend/resume
• Hardware reset pin (RESET\)
• Built in decoupling caps and multiple ground pins for low
noise operation
• Separate power and ground planes to improve noise immunity
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
VCC
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
GENERAL DESCRIPTION
The AS8F1M32 is a 32 Mbit, 5.0 volt-only Flash memory. This
device is designed to be programmed in- system with the standard
system 5.0 volt VCC supply. The AS8F1M32 offers an access time
of 90ns, allowing high-speed microprocessors to operate without wait
states. To eliminate bus contention, the device has separate chip enable
(CE\), write enable (WE\) and output enable (OE\) controls.
The device requires only a single 5.0 volt power supply for both
read and write functions. internally generated and regulated voltages
are provided for the program and erase operations.
The device is entirely command set compatible with the JEDEC
single-power-supply FLASH standard. Commands are written to
the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-matching that
controls the erase and programming circuitry. Write cycles also
internally latch addresses and data needed for the programming and
erase operations. Reading data out of the device is similar to reading
from other FLASH or EPROM devices.
Device programming occurs by executing the program command
sequence. This initiates the Embedded Program algorithm - an inter-
nal algorithm that automatically time the program pulse widths and
verifies proper cell margin.
Device erasure occurs by executing the erase command sequence.
This initiates the Embedded Erase algorithm - an internal algorithm
that automatically preprograms the array (if it is not already pro-
grammed) before executing the erase operation. During erase, the
device automatically times the erase pulse widths and verifies proper
cell margin.
The host system can detect whether a program or erase operation
is complete by observing the DQ7 (DATA\ Polling) and DQ6 (toggle)
status bits. After a program or erase cycle has been completed, the
device is ready to read array data or accept another command.
(continued on page 2)
OPTION
• Timing
90ns
120ns
150ns
• Packages
Ceramic Quad Flat Pack (0.88" sq)
- MAX height .140"
- Stand-off Height .035" min
MARKING
-90
-120
-150
QT
For more products and information
please visit our web site at
www.micross.com
AS8F1M32
Rev. 1.6 01/10
Micross Components reserves the right to change products or specifications without notice.
1
A17
WE2\
WE3\
WE4\
A18
A19
NC
43
AS8F1M32
GENERAL DESCRIPTION (cont.)
The Sector Erase Architecture allows memory sectors to be erased
and reprogrammed without affecting the data contents of other sectors.
The device is fully erased when shipped from the factory.
Hardware Data Protection measures include a low VCC detector
that automatically inhibits write operations during power transitions.
The Hardware Sector Protection feature disables both program and
erase operations in any combinations of the sectors of memory. This
can be achieved via programming equipment.
The Erase Suspend feature enables the user to put erase on hold
for any period of time to read data from, or program data to, any sec-
tor that is not selected for erasure. True background erase can thus
be achieved.
The Hardware RESET\ pin terminates any operation in progress and
resets the internal state machine to reading array data. The RESET\
pin may be tied to the system reset circuitry. A system reset would
thus also reset the device, enabling the system microprocessor to read
the boot-up
fi
rmware from the FLASH memory.
The system can place the device into the standby mode. Power
consumption is greatly reduced in this mode.
FLASH
FIGURE 2: FUNCTIONAL BLOCK DIAGRAM
WE
1
\, CS
1
\
RESET\
OE\
A0 - A19
WE
2
\, CS
2
\
WE
3
\, CS
3
\
WE
4
\, CS
4
\
1M x 8
1M x 8
1M x 8
1M x 8
8
8
8
8
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
PIN DESCRIPTION
PIN
I/O
0-31
A
0-19
WE\
1-4
CS\
1-4
OE\
V
CC
GND
RESET\
DESCRIPTION
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Reset
AS8F1M32
Rev. 1.6 01/10
Micross Components reserves the right to change products or specifications without notice.
2
AS8F1M32
ABSOLUTE MAXIMUM RATINGS
*
Voltage on any pin relative to V
SS
...................-2.0V to +7.0V
Power Dissipation, P
T
.........................................................4W
Storage Temperature, T
stg
..............................-65°C to +125°C
Operating Temperature..................................-55°C to +125°C
Short Circuit Output Current, I
OS
(1 output at a time)...100mA
Endurance - Write/Erase Cycles
..
.......1,000,000 min cycles
Data Retention............................................................20 years
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
**Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow, and humidity
(plastics).
FLASH
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(4.5V < VCC < 5.5V , -55°C < T
A
< +125°C)
DESCRIPTION
Input Leakage Current
Output Leakage Current
V
CC
Active Current for Read
V
CC
Active Current for Program or Erase
V
CC
CMOS Standby
V
CC
Standby Current
Output Low Voltage
Output High Voltage
Low V
CC
Lock-Out Voltage
CONDITIONS
V
CC
= 5.5, V
IN
= GND to V
CC
V
CC
= 5.5, V
IN
= GND to V
CC
CS\ = V
IL
, OE\ = V
IH
CS\ = V
IL
, OE\ = V
IH
V
CC
= 5.5V, All Inputs @ V
CC
- 0.2V or V
SS
+0.2V,
RESET\ = CS\
1-4
= V
CC
-0.2V
V
CC
= 5.5, CS\ = V
IH
, RESET\ = V
CC
± 0.3V, f=0
I
OL
= 12.0 mA, V
CC
= 4.5
I
OH
= -2.5 mA, V
CC
= 4.5
SYMBOL
I
LI
I
LO
I
CC1
I
CC2
I
SB
I
CC3
V
OL
V
OH
V
LKO
0.85 x V
CC
3.2
4.2
MIN
-10
-10
MAX
10
10
160
160
4
8
0.45
UNITS
μA
μA
mA
mA
mA
mA
V
V
V
PARAMETER
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
SYMBOL
V
CC
V
SS
V
IH
V
IL
MIN
4.5
0
2.2
-0.5
TYP
5.0
0
---
---
MAX
5.5
0
V
CC
+ 0.5
+0.8
UNIT
V
V
V
V
CAPACITANCE
(T
A
= +25°C)*
PARAMETER
OE\
WE\
1-4
CS\
1-4
Data I/O
Address input
SYM
C
OE
C
WE
C
CS
C
I/O
C
AD
V
IN
= 0V, f = 1.0 MHz
CONDITIONS
MAX
50
20
20
50
50
UNITS
pF
pF
pF
pF
pF
*Parameter is guaranteed, but not tested.
AS8F1M32
Rev. 1.6 01/10
Micross Components reserves the right to change products or specifications without notice.
3
AS8F1M32
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(V
CC
= 5.0V, -55°C < T
A
< +125°C)
-90
MIN
MAX
WE\ CONTROLLED (WRITE/ERASE/PROGRAM OPERATIONS)
PARAMETER
SYM
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Progreamming Operation
Sector Erase
2
1
FLASH
-120
MIN
MAX
120
0
50
0
50
0
50
20
-150
UNITS
MIN
MAX
150
0
50
0
50
0
50
20
ns
ns
ns
ns
ns
ns
ns
ns
300
15
0
50
μs
sec
μs
μs
44
256
10
500
150
sec
sec
ns
ns
ns
150
150
55
35
35
0
ns
ns
ns
ns
ns
ns
20
150
0
50
0
50
0
50
20
μs
ns
ns
ns
ns
ns
ns
ns
ns
300
15
0
44
256
10
μs
sec
μs
sec
sec
ns
t
AVAV
t
ELWL
t
WLWH
t
AVWL
t
DVWH
t
WHDX
t
WLAX
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
t
VCS
3
t
WC
t
CS
t
WP
t
AS
t
DS
t
DH
t
AH
t
WPH
90
0
45
0
45
0
45
20
300
15
0
50
44
256
300
15
0
50
44
256
10
500
120
Read Recovery Time before Write
V
CC
Setup Time
Chip Programming Time
Chip Erase Time
4
5
Output Enable Hold Time
RESET\ Pulse Width
t
OEH
t
RP
t
AVAV
t
AVQV
t
ELQV
t
GLQV
6
6
10
500
90
90
90
40
20
20
0
20
READ-ONLY OPERATIONS
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select High to Output High
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
120
120
50
30
30
0
20
120
0
50
0
50
0
50
20
300
15
0
44
256
5
t
EHQZ
t
GHQZ
t
AXQX
Output Enable High to Output High
Output Hold from Adresses, CS\ or
OE\ Change, whichever is First
6
t
Ready
RST Low to Read Mode
CS\ CONTROLLED (WRITE/ERASE/PROGRAM OPERATIONS)
Write Cycle Time
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Pulse Width High
Duration of Byte Progreamming Operation
Sector Erase Time
2
1
t
AVAV
t
WLEL
t
ELEH
t
AVEL
t
DVEH
t
EHDX
t
ELAX
t
EHEL
t
WHWH1
t
WHWH2
t
GHEL
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
CPH
90
0
45
0
45
0
45
20
300
15
0
44
256
10
Read Recovery Time
Chip Programming Time
3
Chip Erase Time
4
Output Enable Hold Time
t
OEH
10
AS8F1M32
Rev. 1.6 01/10
Micross Components reserves the right to change products or specifications without notice.
4
AS8F1M32
NOTES:
1.
2.
3.
4.
5.
6.
Typical value for t
WHWH1
is 7μs.
Typical value for t
WHWH2
is 1 sec.
Typical value for Chip Programming is 14 sec.
Typical value for Chip Erase Time is 32 sec.
For Toggle and Data Polling.
This parameter is guaranteed, but not tested.
FLASH
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
TYP
V
IL
= 0, V
IH
= 3.0
Input Rise and Fall
5
Input and Output Reference Level
1.5
Output Timing Reference Level
1.5
UNIT
V
ns
V
V
FIGURE 3: AC TEST CURRENT
FIGURE 4: RESET Timing Diagram
AS8F1M32
Rev. 1.6 01/10
Micross Components reserves the right to change products or specifications without notice.
5
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