Si4020 Universal ISM
Band FSK Transmitter
DESCRIPTION
Silicon Labs’ Si4020 is a single chip, low power, multi-channel FSK
transmitter designed for use in applications requiring FCC or ETSI
conformance for unlicensed use in the 315, 433, 868, and 915 MHz bands.
Used in conjunction with IA4320, Silicon Labs’ FSK receiver, the Si4020
transmitter feature EZRadio
TM
technology, which produces a flexible, low
cost, and highly integrated solution that does not require production
alignments. All required RF functions are integrated. Only an external crystal
and bypass filtering are needed for operation.
The Si4020 features a completely integrated PLL for easy RF design, and its
rapid settling time allows for fast frequency hopping, bypassing multipath
fading and interference to achieve robust wireless links. In addition, highly
stable and accurate FSK modulation is accomplished by direct closed-loop
modulation with bit rates up to 256 kbps. The PLL’s high resolution allows
the use of multiple channels in any of the bands.
The integrated power amplifier of the transmitter has an open-collector
differential output that directly drive a loop antenna with programmable
output level. No additional matching network is required. An automatic
antenna tuning circuit is built in to avoid costly trimming procedures and de-
tuning due to the “hand effect”.
For low-power applications, the device supports automatic activation from
sleep mode. Active mode can be initiated by several wake-up events (on-chip
timer timeout, low supply voltage detection, or activation of any of the four
push-button inputs).
The Si4020’s on-chip digital interface supports both a microcontroller mode
and an EEPROM mode. The latter allows complete data transmitter
operation without a microcontroller (both control commands and data are
read from the EEPROM). Any wake-up event can start a transmission of the
corresponding data stored in the EEPROM.
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Si4020
PIN ASSIGNMENT
Microcontroller Mode
EEPROM Mode
This document refers to Si4020-IC Rev
I1.
See www.silabs.com/integration for any applicable
errata. See back page for ordering information.
FEATURES
Fully integrated (low BOM, easy design-in)
No alignment required in production
Fast settling, programmable, high-resolution PLL
Fast frequency hopping capability
Stable and accurate FSK modulation with programmable
deviation
High bit rate (up to 256 kbps)
Direct loop antenna drive
Automatic antenna tuning circuit
Programmable output power level
Alternative OOK support
EEPROM mode supported
SPI bus for applications with microcontroller
Clock output for microcontroller
Integrated programmable crystal load capacitor
Power-saving sleep mode
Multiple event handling options for wake-up activation
Push-button event handling with switch de-bounce
Wake-up timer
Low battery detection
2.2 to 5.4 V supply voltage
Low power consumption
Low standby current (0.3 µA)
Compact 16-pin TSSOP package
FUNCTIONAL BLOCK DIAGRAM
CRYSTAL
OSCILLATOR
REFERENCE
RFP
SYNTHESIZER
RFN
XTL
CLOCK
FREQUENCY
LOAD CAP
MOD
LOW
BATTERY
DETECT
LOW BAT
TRESHOLD
CONTROLLER
LEVEL
OOK
nIRQ/nLBD
CLK/SDO
SDI
SCK
TYPICAL APPLICATIONS
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Remote control
Home security and alarm
Wireless keyboard/mouse and other PC peripherals
Toy control
Remote keyless entry
Tire pressure monitoring
Telemetry
Personal/patient data logging
Remote automatic meter reading
VDD
VSS
TIMEOUT
WAKE-UP
TIMER
PERIOD
nSEL
FSK
PB1 PB2 PB3 PB4
1
Si4020-DS Rev 1.9r 0308
www.silabs.com/integration
Si4020
DETAILED DESCRIPTION
The Si4020 FSK transmitter is designed to cover the unlicensed
frequency bands at 315, 433, 868, and 915 MHz. The device
facilitates compliance with FCC and ETSI requirements.
Wake-Up Timer
The wake-up timer has very low current consumption (1.5 uA
typical) and can be programmed from 1 ms to several days with
an accuracy of ±5%.
It calibrates itself to the crystal oscillator at every startup. When
the oscillator is switched off, the calibration circuit switches on
the crystal oscillator only long enough for a quick calibration (a
few milliseconds) to facilitate accurate wake-up timing.
PLL
The programmable PLL synthesizer determines the operating
frequency, while preserving accuracy based on the on-chip
crystal-controlled reference oscillator. The PLL’s high resolution
allows the usage of multiple channels in any of the bands. The
FSK deviation is selectable (from 30 to 240 kHz with 30 kHz
increments) to accommodate various bandwidth, data rate and
crystal tolerance requirements, and it is also highly accurate due
to the direct closed-loop modulation of the PLL. The transmitted
digital data can be sent asynchronously through the FSK pin or
over the control interface using the appropriate command.
The RF VCO in the PLL performs automatic calibration, which
requires only a few microseconds. To ensure proper operation in
the programmed frequency band, the RF VCO is automatically
calibrated upon activation of the synthesizer. If temperature or
supply voltage change significantly or operational band has
changed, VCO recalibration is recommended.. Recalibration can
be initiated at any time by switching the synthesizer off and back
on again.
Event Handling
In order to minimize current consumption, the device supports
sleep mode. Active mode can be initiated by several wake-up
events: timeout of wake-up timer, detection of low supply
voltage, pressing any of the four push-button inputs, or through
the serial interface. The push-button inputs can be driven by a
logic signal from a microcontroller or controlled directly by
normally open switches. Pull-up resistors are integrated.
If any wake-up event occurs, the wake-up logic generates an
interrupt, which can be used to wake up the microcontroller,
effectively reducing the period the microcontroller has to be
active. The cause of the interrupt can be read out from the
transmitters by the microcontroller through the nIRQ pin.
Interface
An SPI compatible serial interface lets the user select the
operating frequency band and center frequency of the
synthesizer, polarity and deviation of FSK modulation, and output
power level. Division ratio for the microcontroller clock, wake-up
timer period, and low battery detector threshold are also
programmable. Any of these auxiliary functions can be disabled
when not needed. All parameters are set to default after power-
on; the programmed values are retained during sleep mode.
RF Power Amplifier (PA)
The power amplifier has an open-collector differential output and
can directly drive a loop antenna with a programmable output
power level. An automatic antenna tuning circuit is built in to
avoid costly trimming procedures and the so-called “hand effect.”
The transmitters can operate in On-Off Keying (OOK) mode by
switching the power amplifier on and off. When the appropriate
control bit is set using the Power Setting Command, the FSK pin
becomes an enable input (active high) for the power amplifier.
EEPROM Mode
In simple applications, the on-chip digital controller provides the
transmitters with direct interface to a serial (SPI) EEPROM. In this
case, no external microcontroller is necessary. Wake-up events
initiate automatic readout of the assigned command sequence
from EEPROM memory. For every event, there is a dedicated
starting address available in the EEPROM.
Programming the EEPROM is very simple. Any control command
can be programmed in the EEPROM sequentially (same as in
microcontroller mode).
The internal power-on reset (POR) is a dedicated event, which
can be used to program the basic settings of the transmitters. In
this case the chip starts to read out the preprogrammed data
from the 00h address in EEPROM. Data can be transmitted with
the help of the Data Transmit Command, which tells the
transmitters how many bytes must be transmitted. The whole
process finishes with a Sleep Command.
Crystal Oscillator
The chip has a single-pin crystal oscillator circuit, which provides
a 10 MHz reference signal for the PLL. To reduce external parts
and simplify design, the crystal load capacitor is internal and
programmable. Guidelines for selecting the appropriate crystal
can be found later in this datasheet.
The transmitters can supply the clock signal for the
microcontroller, so accurate timing is possible without the need
for a second crystal. When the chip receives a Sleep Command
from the microcontroller and turns itself off, it provides several
further clock pulses (“clock tail”) for the microcontroller to be
able to go to idle or sleep mode. The length of the clock tail is
programmable.
Low Battery Voltage Detector
The low battery voltage detector circuit monitors the supply
voltage and generates an interrupt if it falls below a
programmable threshold level. The detector circuit has 50 mV
hysteresis.
2
Si4020
PACKAGE PIN DEFINITIONS, MICROCONTROLLER MODE
Pin type key: D=digital, A=analog, S=supply, I=input, O=output, IO=input/output
Microcontroller Mode Pin Assignment
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
SDI
SCK
nSEL
PB1
PB2
PB3
PB4
CLK
XTL
VSS
MOD
RFN
RFP
nIRQ
VDD
FSK
Type
DI
DI
DI
DI
DI
DI
DI
DO
AIO
S
DI
AO
AO
DO
S
DI
Function
Data input of serial control interface
Clock input of serial control interface
Chip select input of serial control interface (active low)
Push-button input #1 (active low with internal pull-up resistor)
Push-button input #2 (active low with internal pull-up resistor)
Push-button input #3 (active low with internal pull-up resistor)
Push-button input #4 (active low with internal pull-up resistor)
Microcontroller clock (1 MHz-10 MHz)
Crystal connection (other terminal of crystal to VSS)
Ground reference
Connect to logic high (microcontroller mode)
Power amplifier output (open collector)
Power amplifier output (open collector)
Interrupt request output for microcontroller (active low) and status read output
Positive supply voltage
Serial data input for FSK modulation
3
Si4020
Typical Application, Microcontroller Mode
VDD
C1
2.2µF
C2
10nF
C3
GND
R1
470
GP3
GP6
To other GP7
circuits GP8
GP9
GP4
MICRO
CONTROLLER
GP2
GP1
GP0
SDI
SCK
nSEL
PB1
GP5
GND
CLKin
(EC osc. mode)
PB2
PB3
PB4
CLK
1
2
3
4
5
6
7
8
16
15
14
13
FSK
VDD
nIRQ
RFP
RFN
MOD
VSS
XTL
X1
10MHz
GND
GND
OPTIONAL
GND
Antenna
D1
LED
RED
OPTIONAL
IA4220
12
11
10
9
S1
S2
S3
Note:
For detailed information about the supply decoupling capacitors see page 6.
S4
4
Si4020
PACKAGE PIN DEFINITIONS, EEPROM MODE
Pin type key: D=digital, A=analog, S=supply, I=input, O=output, IO=input/output
EEPROM Mode Pin Assignment
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
SDI
SCK
nSEL
PB1
PB2
PB3
PB4
SDO
XTL
VSS
MOD
RFN
RFP
nLBD
VDD
FSK
Type
DI
DO
DO
DI
DI
DI
DI
DO
AIO
S
DI
AO
AO
DO
S
DI
Function
Data input of serial control interface
Clock output of serial control interface
Chip select output of serial control interface (active low)
Push-button input #1 (active low with internal pull-up resistor)
Push-button input #2 (active low with internal pull-up resistor)
Push-button input #3 (active low with internal pull-up resistor)
Push-button input #4 (active low with internal pull-up resistor)
Data output of serial control interface
Crystal connection (other terminal of crystal to VSS)
Ground reference
Connect to logic low (EEPROM mode)
Power amplifier output (open collector)
Power amplifier output (open collector)
Low battery voltage detector output (active low)
Positive supply voltage
Not used, connect to VDD or VSS
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