HV7131B
Electronics Industries Co., Ltd.
System IC Division
DESCRIPTION
HV7131B is a highly integrated single chip CMOS color image sensor using Hyundai 0.5um CMOS process
developed for image application to realize high efficiency R/G/B photo sensor. The sensor has 648X488 pixel
array, and in general color interpolation method using 3x3 spatial mask with window size 642X482 pixels may
be used for VGA(640X480) display mode. Each compact active pixel element has high photo-sensitivity and
converts photon energy to analog voltage signal. The sensor has three on-chip 8 bit Digital to Analog Convert
(DAC) and 648 comparators to digitize the pixel output. The three on-chip 8 bit DAC can be used for
independent R/G/B gain control. Hyundai proprietary on-chip Correlated Double Sampling (CDS) circuit can
reduce Fixed Pattern Noise (FPN) dramatically. The whole 8 bit digital color raw data is directly available on
the package pins and just a few control signals are needed for whole chip control so that it is very easy to
configure CMOS imaging system.
PRELIMINARY
CMOS IMAGE SENSOR
With 8-bit ADC
FEATURES
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648 x 488 pixels resolution
Active pixel size: 8um x 8um
High efficiency R/G/B color photo sensors
Integrated 8-bit ADC for direct digital output
Low power 3.3V operation (5V tolerant I/O)
Integrated pan control and window sizing
Clock speed up to 15MHz
Programmable frame rate and synchronous format
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Full function control through standard I
2
C bus
Built-in Automatic Gain Control AGC
48Pin CLCC / 20Pin CDIP
Bayer RGB color pattern
Anti-blooming circuit
Flexible exposure time control
Integrated on-chip timing and drive control
1/3" optical format
TECHNICAL SPECIFICATION
Pixel resolution
Pixel size
Fill factor
Format
Sensitivity
Supply voltage for analog
Supply voltage for digital
Supply voltage for 5V tolerant input
Power Consumption
Operating temperature
Technology
648x488
8x8um
2
30%
VGA
2.2V/lux·sec
3.3V
3.3V
5.0V
FUNCTIONAL BLOCK DIAGRAM
Control Register & Logic
I
2
C
Decoder/Pixel Driver
Pixel Array
ADC Block
Line Buffer
@15MHz
0~40 Centigrade
0.5um 3metal CMOS
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
-1-
1999 Hyundai System IC Division
HV7131B
Electronics Industries Co., Ltd.
System IC Division
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
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PRELIMINARY
CMOS IMAGE SENSOR
With 8-bit ADC
Supply voltage(Analog, Digital)
Voltage on any input pins
Operating Temperature(Centigrade)
Storage Temperature(Centigrade)
:
:
:
:
3.0 V
0V
0
-30
~
~
~
~
3.6 V
5.0 V
40
80
Note
: Input pins are 5V tolerant. Stresses exceeding the absolute maximum ratings may induce failure.
DC Operating Conditions
Symbol
V
dd
V
ih
V
il
V
oh
V
ol
T
a
Parameter
Internal operation supply voltage
Input voltage logic "1"
Input voltage logic "0"
Output voltage logic "1"
Output voltage logic "0"
Ambient operating temperature
Units
Volt
Volt
Volt
Volt
Volt
Celsius
Min.
3.0
2.0
0
2.15
0.4
0
Max.
3.6
5
0.8
3.6
0.4
40
6.5
6.5
60
60
Load[pF]
Notes
AC Operating Conditions
Symbol
MCLK
SCK
Parameter
Main clock frequency
I
2
C clock frequency
Max Operation Frequency
15
400
Units
MHz
KHz
Notes
1
2
1. MCLK can be divided according to Clock Divide Register for internal clock.
2.
SCK is driven by host processor. For the detail serial bus timing, refer to I
2
C Spec.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
-2-
1999 Hyundai System IC Division
HV7131B
Electronics Industries Co., Ltd.
System IC Division
PRELIMINARY
CMOS IMAGE SENSOR
With 8-bit ADC
ELECTRO-OPTICAL CHARACTERISTICS
color temperature of light source: 3200K / IR cut-off filter (CM-500S, 1mmt) is used.
Parameter
Sensitivity
Dark Signal
Output Saturation Signal
Dynamic Range
Output Signal Shading
Dark Signal Shading
Frame Rate
Note:
Units
mV / luxžsec
mV/sec
mV
dB
%
mV/sec
fps
Min.
1600
-
1200
-
-
-
-
Typical
2200
-
-
-
8
-
-
Max.
-
50
Note
1)
2)
3)
4)
5)
6)
7)
-
48
13
10
45
1) Measured at 28lux illumination for exposure time 10 ms.
2) Measured at zero illumination for exposure time 50 ms. (T
temp
= 40 Centigrade)
3) Measured at V
dd
=3.3V and 100lux illumination for exposure time 50msec.
4) 48dB is limited by 8-bit ADC.
5) Variance of average value of 4x4 pixels response of each block over all equal blacks at 50%
saturation level illumination for exposure time 10msec.
6) Range between V
max
and V
min
at zero illumination for exposure time 50msec, where V
max
and V
min
are the maximum and minimum values of each block’ s response, respectively.
7) Measured at MCLK 15MHz.
Integration time must be set in order for effective window height not to exceed window height.
It’ s because effective window height is directly proportional to integration time.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
-3-
1999 Hyundai System IC Division
HV7131B
Electronics Industries Co., Ltd.
System IC Division
PRELIMINARY
CMOS IMAGE SENSOR
With 8-bit ADC
INPUT / OUTPUT AC CHARACTERISTICS
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All output timing delays are measured with output load 60[pF].
Output delay include the internal clock path delay[6ns] and output driving delay that changes in
respect to the output load, the operating environment, and a board design.
Due to the variable valid time delay of the output, output signals may be latched in the negative
edge of MCLK for the stable data transfer between the image sensor and a host for less than
15MHz operation.
MCLK to HSYNC/VSYNC Timing
T
1
MCLK
HSYNC/VSYNC
T
2
T
1
T
1
: MCLK rising to HSYNC/VSYNC valid maximum Time : 18ns [output load: 60pF]
T
2
: HSYNC/VSYNC valid Time : minimum 1clock(subject to T
1
, T
2
timing rule)
MCLK to DATA Timing
T
3
MCLK
DATA[7:0]
Valid DATA
T
3
T
3
: MCLK rising to DATA Valid maximum Time : 18ns [output load: 60pF]
Note)
HSYNC signal is high when valid data is on the DATA bus.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
-4-
1999 Hyundai System IC Division
HV7131B
Electronics Industries Co., Ltd.
System IC Division
PRELIMINARY
CMOS IMAGE SENSOR
With 8-bit ADC
INPUT / OUTPUT AC CHARACTERISTICS (Continue)
ENB Timing
T
4
T
5
MCLK
ENB
T
6
T
T
4
: ENB Setup Time : 5[ns]
T
5
: ENB Hold Time : 5[ns]
T
6
: ENB Valid Time : minimum 2 Clock
RESET Timing
Must in Valid(active low) state at least 8 MCLK periods
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0
-5-
1999 Hyundai System IC Division
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