NVMFS5826NL
Power MOSFET
Features
60 V, 24 mW, 26 A, Single N−Channel
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFS5826NLWF
−
Wettable Flanks Product
AEC−Q101 Qualified and PPAP Capable
These are Pb−Free Devices and RoHS Compliant
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V
(BR)DSS
60 V
R
DS(ON)
MAX
24 mW @ 10 V
32 mW @ 4.5 V
I
D
MAX
26 A
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
YJ−mb
(Notes 1,
2, 3, 4)
Power Dissipation
R
YJ−mb
(Notes 1, 2, 3)
Continuous Drain Cur-
rent R
qJA
(Notes 1, 3,
4)
Power Dissipation
R
qJA
(Notes 1 & 3)
Pulsed Drain Current
T
mb
= 25°C
Steady
State
T
mb
= 100°C
T
mb
= 25°C
T
mb
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
60
±20
26
19
39
19
8.0
6.0
3.6
1.8
130
−55
to
+ 175
32
20
A
°C
A
mJ
A
Y
W
ZZ
1
Unit
V
V
A
G (4)
W
S (1,2,3)
A
N−CHANNEL MOSFET
D (5,6)
W
MARKING
DIAGRAM
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
DD
= 24 V, V
GS
= 10 V,
I
L(pk)
= 20 A, L = 0.1 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
T
L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Mounting Board (top)
−
Steady
State (Notes 2, 3)
Junction−to−Ambient
−
Steady State (Note 3)
Symbol
R
YJ−mb
R
qJA
Value
3.9
42
Unit
°C/W
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2013
May, 2013
−
Rev. 3
1
Publication Order Number:
NVMFS5826NL/D
NVMFS5826NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
(BR)DSS
I
DSS
I
GSS
V
GS(TH)
R
DS(on)
g
FS
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dIs/dt = 100 A/ms,
I
S
= 10 A
V
GS
= 0 V,
I
S
= 10 A
T
J
= 25°C
T
J
= 125°C
V
GS
= 4.5 V, V
DS
= 48 V,
I
D
= 10 A, R
G
= 2.5
W
V
GS
= 10 V, V
DS
= 48 V, I
D
= 10 A
V
GS
= 4.5 V, V
DS
= 48 V, I
D
= 10 A
V
GS
= 0 V, I
D
= 250
mA
V
GS
= 0 V,
V
DS
= 60 V
T
J
= 25°C
T
J
= 125°C
60
1.0
10
±100
nA
V
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Drain−to−Source On Resistance
V
DS
= 0 V, V
GS
=
±
20 V
V
GS
= V
DS
, I
D
= 250
mA
V
GS
= 10 V, I
D
= 10 A
V
GS
= 4.5 V, I
D
= 10 A
V
DS
= 15 V, I
D
= 5 A
V
GS
= 0 V, f = 1 MHz,
V
DS
= 25 V
1.5
18
24
8.0
2.5
24
32
V
mW
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
S
850
85
50
9.1
1.0
3.0
4.0
17
pF
nC
nC
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
9.0
32
15
24
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
0.8
0.7
15
11
4.0
11
nC
ns
1.2
V
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
5. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS5826NL
TYPICAL CHARACTERISTICS
60
50
4.0 V
40
30
3.5 V
20
10
0
V
GS
= 3.0 V
0
1
2
3
4
5
0
1
40
10 V
4.5 V
I
D
, DRAIN CURRENT (A)
30
V
DS
≥
10 V
T
J
= 25°C
I
D
, DRAIN CURRENT (A)
20
T
J
= 25°C
T
J
= 125°C
2
3
10
T
J
=
−55°C
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.050
I
D
= 10 A
T
J
= 25°C
0.040
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.040
Figure 2. Transfer Characteristics
T
J
= 25°C
0.030
V
GS
= 4.5 V
0.030
0.020
V
GS
= 10 V
0.020
0.010
2
4
6
8
10
0.010
5
10
15
20
25
30
35
40
45
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
175
V
GS
= 10 V
I
D
= 10 A
I
DSS
, LEAKAGE (nA)
10000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
1000
T
J
= 125°C
100
10
20
30
40
50
60
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS5826NL
TYPICAL CHARACTERISTICS
1200
1000
C, CAPACITANCE (pF)
800
600
400
200
0
C
rss
0
10
20
30
40
50
60
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
C
oss
C
iss
V
GS
= 0 V
T
J
= 25°C
10
8
6
4
2
0
0
Q
gs
Q
gd
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Q
T
V
DS
= 48 A
I
D
= 10 A
T
J
= 25°C
2
4
6
8
10
12
14
16
18
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
60
I
S
, SOURCE CURRENT (A)
50
40
30
20
10
0
0.5
100
V
GS
= 0 V
T
J
= 25°C
t, TIME (ns)
10
t
d(off)
t
d(on)
t
r
t
f
1.0
V
DD
= 48 V
V
GS
= 4.5 V
I
D
= 10 A
1
10
R
G
, GATE RESISTANCE (W)
100
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
V
GS
= 10 V
Single Pulse
T
C
= 25°C
10
ms
20
Figure 10. Diode Forward Voltage vs. Current
E
AS
, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
I
D
= 20 A
15
I
D
, DRAIN CURRENT (A)
100
100
ms
1 ms
10 ms
10
10
1
5
0.1
0.1
R
DS(on)
Limit
Thermal Limit
Package Limit
dc
1
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
100
0
25
50
75
100
125
150
175
T
J
, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
NVMFS5826NL
TYPICAL CHARACTERISTICS
100
Duty Cycle = 0.5
10
0.2
0.1
0.05
1 0.02
0.01
0.1
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
R
qJA(t)
(°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
0.01
0.000001
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
NVMFS5826NLT1G
NVMFS5826NLWFT1G
NVMFS5826NLT3G
NVMFS5826NLWFT3G
Marking
V5826L
5826LW
V5826L
5826LW
Package
DFN5
(Pb−Free)
DFN5
(Pb−Free)
DFN5
(Pb−Free)
DFN5
(Pb−Free)
Shipping
†
1500 / Tape & Reel
1500 / Tape & Reel
5000 / Tape & Reel
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
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