White Electronic Designs
WV3HG64M32EEU-D4
ADVANCED*
256MB – 64Mx32 DDR2 SDRAM UNBUFFERED
FEATURES
200-pin, Small-Outline DIMM (SO-DIMM)
Fast data transfer rates: PC2-5300*, PC2-4200 and
PC2-3200
Utilizes 667*, 533 and 400 Mb/s DDR2 SDRAM
components
V
CC
= 1.8V ±0.1V
V
CCSPD
= 1.7V to 3.6V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Four-bit prefetch architecture
DLL to align DQ and DQS transitions with CK
Multiple internal device banks for concurrent
operation
Supports duplicate output strobe (RDQS/RDQS#)
Programmable CAS# latency (CL): 3, 4, and 5
Programmable burst: length (4, 8)
Adjustable data-output drive strength
On-die termination (ODT)
Serial Presence Detect (SPD) with EEPROM
Auto & self refresh (64ms: 8,192 cycle refresh)
Row Addr: A0~A13, Column Addr: A0~A9,
Bank Addr: BA0~BA1
Gold edge contacts
RoHS Compliant
JEDEC Package option
• 200 Pin (SO-DIMM)
• PCB – 30.00mm (1.181") TYP.
NOTE: Consult factory for availability of:
• Vendor source control options
• Industrial temperature option
DESCRIPTION
The WV3HG64M32EEU is a 64Mx32 Double Data Rate
2 SDRAM memory module based on 512Mb DDR2
SDRAM components. The module consists of four 64Mx8,
in FBGA package mounted on a 200 pin SO-DIMM FR4
substrate.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
OPERATING FREQUENCIES
PC2-5300*
Clock Speed
CL-t
RCD
-t
RP
Note:
• Consult factory for availability
PC2-4200
266MHz
4-4-4
PC2-3200
200MHz
3-3-3
333MHz
5-5-5
May 2006
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
PIN CONFIGURATION
PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL
51
DQS2
101
A1
151
NC
1
VREF
2
V
SS
52
DM2
102
A0
152
NC
53
V
SS
103
153
NC
3
V
SS
VCC
4
DQ4
54
V
SS
104
154
NC
VCC
5
DQ0
55
DQ18
105
A10/AP
155
V
SS
6
DQ5
56
DQ22
106
BA1
156
V
SS
7
DQ1
57
DQ19
107
BA0
157
NC
8
V
SS
58
DQ23
108
RAS#
158
NC
9
V
SS
59
V
SS
109
WE#
159
NC
10
DM0
60
V
SS
110
CS0#
160
NC
11
DQS0#
61
DQ24
111
161
V
SS
VCC
12
V
SS
62
DQ28
112
162
V
SS
VCC
13
DQS0
63
DQ25
113
CAS#
163
NC
14
DQ6
64
DQ29
114
ODT0
164
NC
65
V
SS
115
NC
165
V
SS
15
V
SS
16
DQ7
66
V
SS
116
A13
166
NC
17
DQ2
67
DM3
117
167
NC
VCC
18
V
SS
68
DQS3#
118
168
V
SS
VCC
19
DQ3
69
NC
119
NC
169
NC
20
DQ12
70
DQS3
120
NC
170
NC
21
V
SS
71
V
SS
121
V
SS
171
V
SS
22
DQ13
72
V
SS
122
V
SS
172
V
SS
23
DQ8
73
DQ26
123
NC
173
NC
74
DQ30
124
NC
174
NC
24
V
SS
25
DQ9
75
DQ27
125
NC
175
NC
26
DM1
76
DQ31
126
NC
176
NC
27
V
SS
77
V
SS
127
V
SS
177
V
SS
28
V
SS
78
V
SS
128
V
SS
178
V
SS
29
DQS1#
79
CKE0
129
NC
179
NC
30
CK0
80
NC
130
NC
180
NC
31
DQS1
81
131
NC
181
NC
VCC
32
CK0#
82
132
V
SS
182
NC
VCC
83
NC
133
V
SS
183
V
SS
33
V
SS
34
V
SS
84
NC
134
NC
184
V
SS
35
DQ10
85
NC
135
NC
185
NC
36
DQ14
86
NC
136
NC
186
NC
37
DQ11
87
137
NC
187
V
SS
VCC
38
DQ15
88
138
V
SS
188
NC
VCC
39
V
SS
89
A12
139
V
SS
189
NC
40
V
SS
90
A11
140
NC
190
V
SS
41
V
SS
91
A9
141
NC
191
NC
42
V
SS
92
A7
142
NC
192
NC
43
DQ16
93
A8
143
NC
193
V
SS
44
DQ20
94
A6
144
V
SS
194
NC
45
DQ17
95
145
V
SS
195
SDA
VCC
46
DQ21
96
146
NC
196
V
SS
VCC
47
V
SS
97
A5
147
NC
197
SCL
48
V
SS
98
A4
148
NC
198
SA0
49
DQS2#
99
A3
149
V
SS
199
VCCSPD
50
NC
100
A2
150
V
SS
200
SA1
WV3HG64M32EEU-D4
ADVANCED
PIN NAMES
SYMBOL
A0-A13
ODT0
CK0, CK0#
CKE0
CS0#
RAS#, CAS#, WE#
BA0, BA1
DM0-DM3
A10/AP
DQ0-DQ31
DQS0-DQS3
DQS0#-DQS3#
SCL
SA0-SA1
SDA
V
CC
V
REF
V
SS
V
CCSPD
NC
DESCRIPTION
Address input
On-Die Termination
Differential Clock Inputs
Clock Enable input
Chip select
Command Inputs
Bank Address Inputs
Input Data Mask
Address input/Auto precharge
Data Input/Output
Data Strobe
Serial Clock for Presence Detect
Presence Detect Address Inputs
Serial Presence Detect Data
Power Supply: +1.8V ±0.1V
SSTL_18 reference voltage
Ground
Serial EEPROM Positive Power
Supply
No Connect
May 2006
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
CS0#
3
WV3HG64M32EEU-D4
ADVANCED
DQS0#
DQS0
DM0
DM CS#DQS DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS1#
DQS1
DM1
DM CS# DQS DQS#
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS2#
DQS2
DM2
DM CS# DQS DQS#
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQS3#
DQS3
DM3
DM CS# DQS DQS#
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
3
SCL
BA0-BA1
A0-A13
RAS#
CAS#
WE#
CKE0
ODT0
BA0-BA1: DDR2 SDRAMs
A0-A13: DDR2 SDRAMs
DDR2 SDRAMs
RAS#:
CAS#:
DDR2 SDRAMs
WE#:
DDR2 SDRAMs
CKE0:
DDR2 SDRAMs
ODT0:
DDR2 SDRAMs
Serial PD
WP A0
A1
A2
SA0 SA1
SDA
V
CCSPD
V
CC
V
REF
Serial PD
DDR2 SDRAMs
DDR2 SDRAMs
DDR2 SDRAMs
100
CK0
CK0#
DDR2 SDRAMs
DDR2 SDRAMs
NOTE: All resistor value, are 22 ohms ± 5% unless otherwise specified.
V
SS
May 2006
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
IN
, V
OUT
T
STG
I
L
Parameter
Voltage on V
CC
pin relative to V
SS
Voltage on any pin relative to V
SS
Storage Temperature
Input leakage current; Any input 0V<V
IN
<V
CC
;
VREF
input
0V<V
IN
<0.95V; Other pins not under test = 0V
WV3HG64M32EEU-D4
ADVANCED
Min
-0.5
-0.5
-55
Command/Address,
RAS#, CAS#, WE#
CS#, CKE
CK, CK#
DM
-20
-20
-20
-5
-5
-8
Max
2.3
2.3
100
20
20
20
5
5
8
Units
V
V
˚C
μA
μA
μA
μA
μA
μA
I
OZ
I
VREF
Output leakage current; 0V<V
IN
<V
CC
; DQs and ODT are
disable
V
REF
leakage current; V
REF
= Valid
VREF
level
DQ, DQS, DQS#
DC OPERATING CONDITIONS
All voltages referenced to V
SS
Rating
Parameter
Supply Voltage
I/O Reference Voltage
I/O Termination Voltage
Symbol
V
CC
V
REF
V
TT
Min.
1.7
0.49 x V
CC
V
REF
-0.04
Type
1.8
0.50 x V
CC
V
REF
Max.
1.9
0.51 x V
CC
V
REF
+0.04
Units
V
V
V
Notes
3
1
2
Notes:
1. V
REF
is expected to equal V
CC
/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on V
REF
may not exceed +/-1 percent of the DC
value. Peak-to-peak AC noise on V
REF
may not exceed +/-2 percent of V
REF
. This measurement is to be taken at the nearest V
REF
bypass capacitor.
2. V
TT
in sot applied directly to the device. V
TT
is a system supply for signal termination resistors, is expected to be set equal to V
REF
and must track variations in the DC level of V
REF
.
3. V
CCQ
of all IC's are tied to V
CC
.
May 2006
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
INPUT/OUTPUT CAPACITANCE
T
A
= 25°C, f = 100MHz
Parameter
Input Capacitance (A0~A13, BA0~BA1, RAS#, CAS#, WE#)
Input Capacitance CKE0, ODT
Input Capacitance CS0#
Input Capacitance (CK0, CK0#)
Input Capacitance (DM0 ~ DM3), (DQS0 ~ DQS3)
Input Capacitance (DQ0 ~ DQ31)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
(665)
C
IN5
(534)
C
OUT1
(665)
C
OUT1
(534)
Notes:
• AC specification is based on
SAMSUNG
components. Other DRAM manufactures specification may be different.
WV3HG64M32EEU-D4
ADVANCED
Min
8
8
8
8
6.5
6.5
6.5
6.5
Max
12
12
12
12
7.5
8
7.5
8
Units
pF
pF
pF
pF
pF
pF
pF
pF
OPERATING TEMPERATURE CONDITION
Parameter
Operating temperature (Commercial)
Symbol
TOPER
Rating
0
°
to 85°
Units
°C
Notes
1, 2
Notes:
1. Operating temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JEDED JESD51.2
2. At 0°C - 85°C, operation temperature range, all DRAM specification will be supported.
INPUT DC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Symbol
V
IH
(DC)
V
IL
(DC)
Min
V
REF
+ 0.125
-0.300
Max
V
CC
+ 0.300
V
REF
- 0.125
Units
V
V
INPUT AC LOGIC LEVEL
All voltages referenced to V
SS
Parameter
Input High (Logic 1) Voltage DDR2-400 & DDR2-533
Input Low (Logic 1) Voltage DDR2-667
Input Low (Logic 0) Voltage DDR2-400 & DDR2-533
Input Low (Logic 0) Voltage DDR2-667
Symbol
V
IH
(AC)
V
IH
(AC)
V
IL
(AC)
V
IL
(AC)
Min
V
REF
+ 0.250
V
REF
+ 0.200
-
-
Max
-
-
V
REF
- 0.250
V
REF
- 0.200
Units
V
V
V
V
May 2006
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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