verter with two very low dropout (VLDO) linear regulators
to provide up to three stepped-down output voltages from
a single input voltage. The input voltage range is ideally
suited for Li-Ion battery-powered applications, as well
as powering low voltage logic from 5V or 3.3V rails. The
output voltage range extends down to 0.4V for the VLDO
regulators and 0.8V for the buck.
The 1A synchronous buck converter provides the main
output with high efficiency, typically 85%. The two 300mA
VLDO regulators can run off the main output to provide
two additional lower voltage outputs. A built-in supply
monitor provides a power good indication.
The buck converter switches at 2.25MHz, allowing the use
of small surface mount inductors and capacitors. Constant
frequency current mode operation produces controlled
output spectrum and fast transient response. A mode-
select pin allows automatic Burst Mode operation to be
enabled for higher efficiency at light load, or disabled for
lower noise operation down to very light loads. The two
VLDO regulators are stable with ceramic output capacitors
as small as 1µF
.
L,
LT, LTC, LTM and Burst Mode are registered trademarks and VLDO, Hot Swap, PowerPath
and Bat-Track are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 5481178, 6611131,
6304066, 6498466, 6580258.
n
n
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n
n
n
n
n
n
n
n
High Efficiency Triple Step-Down Outputs from a
Single Input Supply
1A Synchronous Buck Regulator Provides Main
Step-Down Output and Powers Two 300mA VLDO™
Linear Regulators
Output Voltages as Low as 400mV (VLDO Outputs)
Power Good Output
Input Voltage Range: 2.7V to 5.5V
Independent Enable Pin for Each Supply
Low (140µA Typ) No-Load Quiescent Current with
All Outputs Enabled
Constant Frequency Current Mode Operation
2.25MHz Switching Frequency Uses Small Inductors
Defeatable Automatic Burst Mode
®
Operation for
High Efficiency at Light Loads
±1.5% Reference Accuracy
Overtemperature Protection
Thermally Enhanced 4mm
×
3mm 14-Pin DFN
Package
applicaTions
n
n
Low Power Handheld Devices
Low Voltage and Multivoltage Power for Digital
Logic, I/O, FPGAs, CPLDs, ASICs and CPUs
Typical applicaTion
V
IN
2.9V TO 5.5V
L1
1.8µH
22µF
X7R
V
IN
SW
59k
BUCKFB
LTC3446
LV
IN
PGOOD LV
OUT1
MODESEL
ENBUCK
ENLDO1 LV
FB1
ENLDO2
3.3k
1000pF
47.5k
EFFICIENCY (%)
V
OUT
1.5V
300mA MAX
90
80
70
60
50
40
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
1
10
100
LOAD CURRENT (mA)
1000
3446 TA01b
22µF
X7R
V
OUT
1.8V
400mA MAX
Buck Efficiency vs Buck Load Current
100
Burst Mode
OPERATION
PWM
MODE
DIGITAL
CONTROL
110k
40.2k
2.2µF
X7R
I
TH
LV
OUT2
80.6k
LV
FB2
GND
3446 TA01
2.2µF
X7R
V
OUT
1.2V
300mA MAX
40.2k
L1: TOKO A960AW-1R8M
3446ff
1
LTC3446
absoluTe MaxiMuM raTings
(Note 1)
pin conFiguraTion
TOP VIEW
MODESEL
V
IN
I
TH
PGOOD
LV
OUT1
LV
IN
LV
OUT2
1
2
3
4
5
6
7
15
14 SW
13 ENBUCK
12 BUCKFB
11 ENLDO1
10 LV
FB1
9 LV
FB2
8 ENLDO2
V
IN
, LV
IN
to GND ......................................... – 0.3V to 6V
MODESEL, ENBUCK, ENLDO1,
ENLDO2 to GND .......................................... –0.3V to 6V
BUCKFB to GND .......................................... –0.3V to 6V
LV
FB1
, LV
FB2
to GND .................................... –0.3V to 6V
I
TH
to GND ..... –0.3V to the Lesser of (V
IN
+ 0.3V) or 3V
SW to GND......–0.3V to the Lesser of (V
IN
+ 0.3V) or 6V
LV
OUT1
, LV
OUT2
to GND .......... –0.3V to the Lesser of (LV
IN
+ 0.3V) or 6V
PGOOD to GND ............................................ –0.3V to 6V
LV
OUT1
, LV
OUT2
Short-Circuit
to GND Duration............................................... Indefinite
Operating Junction Temperature Range
(Note 2).................................................. –40°C to 125°C
Storage Temperature Range.................. –65°C to 150°C
DE PACKAGE
14-LEAD (4mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3446EDE#PBF
LTC3446IDE#PBF
TAPE AND REEL
LTC3446EDE#TRPBF
LTC3446IDE#TRPBF
PART MARKING*
3446
3446
PACKAGE DESCRIPTION
14-Lead (4mm
×
3mm) Plastic DFN
14-Lead (4mm
×
3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V unless otherwise specified. (Note 2)
SYMBOL
V
IN
V
UVLO
I
Q
PARAMETER
Input Voltage Range
V
IN
Undervoltage Lockout Threshold
V
IN
Undervoltage Lockout Hysteresis
V
IN
Quiescent Current (Note 4)
Buck Enabled Only, Not Sleeping
Buck Enabled Only, Sleeping
One LDO Enabled Only
All Three Outputs Enabled, Buck Not Sleeping
All Three Outputs Enabled, Buck Sleeping
Shutdown
CONDITIONS
(Note 3)
V
IN
Rising
V
BUCKFB
= 0V, I
SW
= 0mA
V
BUCKFB
= 1V, I
SW
= 0mA
V
LVIN
= 1.5V, 10µA LDO Output Load
V
BUCKFB
= 0V, I
SW
= 0mA, V
LVIN
= 1.5V,
10µA Output Load on Each LDO
V
BUCKFB
= 1V, I
SW
= 0mA, V
LVIN
= 1.5V,
10µA Load on Each LDO
V
ENBUCK
= 0V, V
ENLDO1
= 0V, V
ENLDO2
= 0V
●
●
elecTrical characTerisTics
MIN
2.7
TYP
2.37
10
310
50
75
400
140
MAX
5.5
2.5
30
500
75
100
600
210
1
UNITS
V
V
mV
µA
µA
µA
µA
µA
µA
3446ff
2
LTC3446
elecTrical characTerisTics
SYMBOL
R
PGOOD
I
PGOOD
I
BUCKFB
V
BUCKFB
∆V
BUCKFB
I
MAXP
I
MAXN
PARAMETER
PGOOD Output Resistance
PGOOD Hi-Z Leakage Current
Feedback Current
Regulated Feedback Voltage
Feedback Voltage Line Regulation
Maximum Peak Inductor Current
NMOS Overcurrent Limit
Feedback Voltage Load Regulation
(with Respect to V
ITH
)
f
OSC
R
PFET
R
NFET
I
LSW
V
ENBUCK
I
ENBUCK
V
MODESEL
I
MODESEL
g
m
V
LVIN
I
LVIN
V
LVFB
I
LVFB
I
LVOUT(MAX)
V
ENLDOx
I
ENLDOx
Oscillator Frequency
R
DS(ON)
of P-Channel FET
R
DS(ON)
of N-Channel FET
SW Leakage
Buck Enable Pin Threshold
Buck Enable Pin Leakage Current
Mode Select Pin Threshold
Mode Select Pin Leakage Current
Error Amplifier Transconductance
LV
IN
Pin Operating Voltage
LV
IN
Pin Operating Current
LV
IN
Shutdown Current
Feedback Pin Regulation Voltage (Note 7)
Feedback Pin Input Current
Continuous Output Current
Short-Circuit Output Current
LDO Enable Pin Threshold
LDO Enable Pin Leakage Current
Output Voltage Load Regulation
(Referred to the LV
FB
Pin)
L
VFB
Line Regulation (with Respect to
the L
VIN
Pin)
L
VFB
Line Regulation (with Respect to
the V
IN
Pin)
V
DO
LV
IN
– LV
OUT
Dropout Voltage
V
IN
to LV
OUT
Headroom Required for
Regulation (Note 3)
V
ENLDOx
= 5.5V, All Other Pins Grounded
∆I
OUT
= 1mA to 300mA
V
LVIN
= 1.5V to 5.5V, V
IN
= 3.6V, V
LVOUT
= 1.2V,
I
OUT
= 1mA
V
LVIN
= 1.5V, V
IN
= 2.7V to 5.5V, V
LVOUT
= 1.2V,
I
OUT
= 1mA
V
IN
= 2.8V, V
LVIN
= 1.5V, V
LVFB
= 0.37V,
I
OUT
= 300mA (Note 9)
I
LVOUT
= 300mA
l
●
●
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V unless otherwise specified. (Note 2)
CONDITIONS
●
MIN
●
●
TYP
8
87
MAX
10
180
1
±30
UNITS
%
Ω
µA
nA
V
mV/V
A
A
mV/V
V
PG(THRESH)
PGOOD Threshold (Note 8)
PGOOD Low, Sinking 1mA
V
PGOOD
= 6V
(Note 5)
(Note 5)
V
IN
= 2.7V to 5.5V (Note 5)
V
BUCKFB
= 0V, Duty Cycle < 35%
V
ITH
= 0.5V to 1V, V
MODESEL
= V
IN
(Note 5)
Synchronous Buck Converter
●
●
●
0.788
1.2
0.800
0.3
1.55
1.8
0.5
0.812
0.5
2.0
●
1.8
2.25
0.13
0.14
2.7
MHz
Ω
Ω
I
SW
= 500mA
I
SW
= –500mA
V
ENBUCK
= 0V, V
SW
= 0V or 5.5V, V
IN
= 5.5V
●
±1
0.3
0.3
450
●
●
µA
V
µA
V
µA
µA/V
V
µA
µA
V
V
nA
mA
mA
0.65
0.65
700
1
1
1
1
950
5.5
V
ENBUCK
= 5.5V, All Other Pins Grounded
V
MODESEL
= 5.5V, All Other Pins Grounded
V
ITH
= 0.6V
(Note 6)
I
OUT
= 10µA
V
ENLDO
= 0V
1mA ≤ I
OUT
≤ 300mA, 1.5V ≤ V
LVIN
≤ 5.5V
V
LVFB
at Regulation
●
●
●
Each VLDO: V
IN
= 3.6V, V
LVIN
= 1.5V, V
LVOUT
= 1.2V, Unless Otherwise Specified
0.9
3
1.5
●
●
●
20
2
0.405
0.408
±10
0.395
0.392
300
0.400
0.400
2
760
0.3
0.65
–1
7.5
0.44
68
1
1
V
µA
mV/A
µV/V
mV/V
175
1.4
mV
V
3446ff
3
LTC3446
elecTrical characTerisTics
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3446 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC3446E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design characterization and correlation with statistical process controls.
The LTC3446I is guaranteed to meet performance specifications over
the –40°C to 125°C operating junction temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors. The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in Watts) according to
the formula:
T
J
= T
A
+ (P
D
•
θ
JA
)
where
θ
JA
(in °C/W) is the package thermal impedance.
Note 3:
Minimum operating V
IN
voltage required for the VLDO regulators
to stay in regulation is:
V
IN
≥ LV
OUT(MAX)
+ 1.4V and V
IN
≥ 2.7V
Note 4:
Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5:
The LTC3446 is tested in a feedback loop that connects the
BUCKFB pin to the output of the buck converter’s error amplifier (i.e., the
I
TH
pin).
Note 6:
Minimum operating LV
IN
voltage required for the VLDO regulators
to stay in regulation is:
LV
IN
≥ L
VOUT(MAX)
+ 100mV and LV
IN
≥ 0.9V
Note 7:
Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 8:
PGOOD assertion indicates that the feedback voltages of all
enabled supplies are within the specified percentage of their target values.
Note 9:
Dropout voltage in the DFN package is assured by design,
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