I2P
AK
BUK9E04-40A
N-channel TrenchMOS logic level FET
Rev. 02 — 3 February 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V loads
Automotive and general purpose
power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
drain-source on-state
resistance
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
V
GS
= 5 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
V
GS
= 4.3 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 11;
see
Figure 12
[1]
Min
-
-
-
-
-
-
Typ
-
-
-
3.7
2.9
3.5
Max Unit
40
75
300
5.9
4
4.4
V
A
W
mΩ
mΩ
mΩ
Static characteristics
NXP Semiconductors
BUK9E04-40A
N-channel TrenchMOS logic level FET
Quick reference data
…continued
Parameter
Conditions
Min
-
Typ
-
Max Unit
1.6
J
Table 1.
Symbol
E
DS(AL)S
Avalanche ruggedness
non-repetitive
I
D
= 75 A; V
sup
≤
40 V;
drain-source avalanche R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25 °C; unclamped
energy
gate-drain charge
V
GS
= 5 V; I
D
= 25 A;
V
DS
= 32 V; T
j
= 25 °C;
see
Figure 13
Dynamic characteristics
Q
GD
-
56
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to drain
mbb076
Simplified outline
mb
Graphic symbol
D
G
S
1 2 3
SOT226 (I2PAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9E04-40A
I2PAK
Description
plastic single-ended package (I2PAK); TO-262
Version
SOT226
Type number
BUK9E04-40A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 February 2011
2 of 14
NXP Semiconductors
BUK9E04-40A
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 1
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 1;
see
Figure 3
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
40 V; R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25 °C; unclamped
Avalanche ruggedness
-
1.6
J
[2]
[1]
[1]
[1]
[2]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-15
-
-
-
-
-
-55
-55
-
-
-
Max
40
40
15
75
75
198
794
300
175
175
198
75
794
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
T
mb
= 25 °C; pulsed; t
p
≤
10 µs; see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
[1]
[2]
Continuous current is limited by package.
Current is limited by power dissipation chip rating.
200
I
D
(A)
150
03ne93
120
P
der
(%)
80
03na19
100
40
50
Capped at 75 A due to package
0
25
50
75
100
125
150
175
200
T
mb
(°C)
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
BUK9E04-40A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 February 2011
3 of 14
NXP Semiconductors
BUK9E04-40A
N-channel TrenchMOS logic level FET
10
3
R
DSon
= V
DS
/ I
D
I
D
(A)
10
2
Capped at 75 A due to package
DC
10
t
p
= 10
μs
03ne68
100
μs
1 ms
10 ms
100 ms
1
1
10
V
DS
(V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9E04-40A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 February 2011
4 of 14
NXP Semiconductors
BUK9E04-40A
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to mounting
base
thermal resistance from junction to ambient
Conditions
see
Figure 4
vertical in still air
Min
-
-
Typ
-
60
Max
0.5
-
Unit
K/W
K/W
1
Z
th(j-mb)
(K/W)
10
−1
03ne69
δ
= 0.5
0.2
0.1
0.05
10
−2
0.02
P
δ
=
t
p
T
Single Shot
10
−3
t
p
T
t
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9E04-40A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 February 2011
5 of 14
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