DP
AK
BUK7212-55B
N-channel TrenchMOS standard level FET
Rev. 2 — 23 February 2011
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for standard level gate drive
sources
Suitable for thermally demanding
environments due to 185 °C rating
1.3 Applications
12 V and 24 V loads
Automotive systems
General purpose power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
drain-source
on-state
resistance
Conditions
T
j
≥
25 °C; T
j
≤
185 °C
V
GS
= 10 V; T
mb
= 25 °C;
see
Figure 3;
see
Figure 1
T
mb
= 25 °C; see
Figure 2
[1]
Min
-
-
-
Typ
-
-
-
Max Unit
55
75
167
V
A
W
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 9;
see
Figure 10
-
10.2 12
mΩ
NXP Semiconductors
BUK7212-55B
N-channel TrenchMOS standard level FET
Quick reference data
…continued
Parameter
Conditions
Min
-
Typ
-
Max Unit
173
mJ
Table 1.
Symbol
E
DS(AL)S
Avalanche ruggedness
non-repetitive
I
D
= 75 A; V
sup
≤
55 V;
drain-source
R
GS
= 50
Ω;
V
GS
= 10 V;
avalanche energy T
j(init)
= 25 °C; unclamped
gate-drain charge V
GS
= 10 V; I
D
= 25 A;
V
DS
= 44 V; T
j
= 25 °C;
see
Figure 11
Dynamic characteristics
Q
GD
-
12
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT428 (DPAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK7212-55B
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
Type number
BUK7212-55B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 23 February 2011
2 of 14
NXP Semiconductors
BUK7212-55B
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1;
see
Figure 3
T
mb
= 100 °C; V
GS
= 10 V; see
Figure 1
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 3;
see
Figure 1
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
55 V; R
GS
= 50
Ω;
V
GS
= 10 V; T
j(init)
= 25 °C; unclamped
[2]
[1]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
185 °C
R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-
-55
-55
-
-
-
-
Max
55
55
20
83
59
75
335
167
185
185
75
83
335
173
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
mJ
[1]
[2]
T
mb
= 25 °C; pulsed; t
p
≤
10 µs;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
Avalanche ruggedness
[1]
[2]
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
BUK7212-55B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 23 February 2011
3 of 14
NXP Semiconductors
BUK7212-55B
N-channel TrenchMOS standard level FET
100
I
D
(A)
75
Capped at 75A due to package
03nl11
120
P
der
(%)
80
03no96
50
40
25
0
0
50
100
150
200
T
mb
(°C)
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
03nl09
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/I
D
t
p
= 10
μs
100
μs
Capped at 75 A due to package
10
DC
1 ms
10 ms
100 ms
1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK7212-55B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 23 February 2011
4 of 14
NXP Semiconductors
BUK7212-55B
N-channel TrenchMOS standard level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to mounting
base
thermal resistance from junction to ambient
Conditions
see
Figure 4
Min
-
-
Typ
-
71.4
Max
0.95
-
Unit
K/W
K/W
1
δ
= 0.5
Z
th(j-mb)
(K/W)
10
−1
0.2
0.1
0.05
0.02
03nk52
10
−2
single shot
P
δ
=
t
p
T
t
p
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7212-55B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 23 February 2011
5 of 14
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