512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Mobile LPSDR SDRAM
MT48H32M16LF – 8 Meg x 16 x 4 Banks
MT48H16M32LF/LG – 4 Meg x 32 x 4 Banks
Features
•
V
DD
/V
DDQ
= 1.7–1.95V
•
Fully synchronous; all signals registered on positive
edge of system clock
•
Internal, pipelined operation; column address can
be changed every clock cycle
•
Four internal banks for concurrent operation
•
Programmable burst lengths: 1, 2, 4, 8, and continu-
ous
•
Auto precharge, includes concurrent auto precharge
•
Auto refresh and self refresh modes
•
LVTTL-compatible inputs and outputs
•
On-chip temperature sensor to control self refresh
rate
•
Partial-array self refresh (PASR)
•
Deep power-down (DPD)
•
Selectable output drive strength (DS)
•
64ms refresh period; 32ms for automotive tempera-
ture
Options
•
V
DD
/V
DDQ
: 1.8V/1.8V
•
Addressing
–
Standard addressing option
–
Reduced page size option
1
•
Configuration
–
32 Meg x 16 (8 Meg x 16 x 4 banks)
–
16 Meg x 32 (4 Meg x 32 x 4 banks)
•
Plastic “green” packages
–
54-ball VFBGA (8mm x 8mm)
2
–
90-ball VFBGA (8mm x 13mm)
3
•
Timing – cycle time
–
6ns at CL = 3
–
7.5ns at CL = 3
•
Power
–
Standard I
DD2
/I
DD7
–
Low-power I
DD2
/I
DD71
•
Operating temperature range
–
Commercial (0˚C to +70˚C)
–
Industrial (–40˚C to +85˚C)
–
Automotive (–40˚C to +105˚C)
•
Revision
Marking
H
LF
LG
32M16
16M32
B4
B5
-6
-75
None
L
None
IT
AT
:C
Notes:
1. Contact factory for availability.
2. Available only for x16 configuration.
3. Available only for x32 configuration.
Table 1: Configuration Addressing
Architecture
Number of banks
Bank address balls
Row address balls
Column address balls
Note: 1. Contact factory for availability.
32 Meg x 16
4
BA0, BA1
A[12:0]
A[9:0]
16 Meg x 32
4
BA0, BA1
A[12:0]
A[8:0]
16 Meg x 32 Reduced
Page Size Option
1
4
BA0, BA1
A[13:0]
A[7:0]
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Table 2: Key Timing Parameters
Clock Rate (MHz)
Speed Grade
-6
Note:
CL = 2
104
CL = 3
166
133
CL = 2
8ns
8ns
Access Time
CL = 3
5ns
5.4ns
-75
104
1. CL = CAS (READ) latency.
Figure 1: 512Mb Mobile LPSDR Part Numbering
MT
Micron Technology
Product Family
48 = Mobile LPSDR SDRAM
48
H 32M16 LF
B4
-75
IT
:C
Design Revision
:C = Device generation
Operating Temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
AT = Automotive (–40°C to +105°C)
Operating Voltage
H = 1.8V/1.8V
Configuration
32M16 = 32 Meg x 16
16M32 = 16 Meg x 32
Low Power
Blank = Standard I
DD2
/I
DD7
L = Low-power I
DD2
/I
DD7
Addressing
LF = Standard addressing
LG = Reduced page size
Cycle Time
-6 = 6ns,
t
CK CL = 3
-75 = 7.5ns,
t
CK CL = 3
Package Codes
B4 = 8mm x 8mm, VFBGA, “green”
B5 = 8mm x 13mm, VFBGA, “green”
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. Micron’s FBGA part marking decoder is available at
www.micron.com/decoder.
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
General Description ......................................................................................................................................... 7
Functional Block Diagram ................................................................................................................................ 8
Ball Assignments and Descriptions ................................................................................................................... 9
Package Dimensions ...................................................................................................................................... 12
Electrical Specifications .................................................................................................................................. 14
Absolute Maximum Ratings ........................................................................................................................ 14
Electrical Specifications – I
DD
Parameters ........................................................................................................ 16
Electrical Specifications – AC Operating Conditions ......................................................................................... 20
Output Drive Characteristics ........................................................................................................................... 23
Functional Description ................................................................................................................................... 26
Commands .................................................................................................................................................... 27
COMMAND INHIBIT .................................................................................................................................. 28
NO OPERATION (NOP) .............................................................................................................................. 28
LOAD MODE REGISTER (LMR) ................................................................................................................... 28
ACTIVE ...................................................................................................................................................... 28
READ ......................................................................................................................................................... 29
WRITE ....................................................................................................................................................... 30
PRECHARGE .............................................................................................................................................. 31
BURST TERMINATE ................................................................................................................................... 31
AUTO REFRESH ......................................................................................................................................... 31
SELF REFRESH ........................................................................................................................................... 32
DEEP POWER-DOWN ................................................................................................................................ 32
Truth Tables ................................................................................................................................................... 33
Initialization .................................................................................................................................................. 38
Mode Register ................................................................................................................................................ 40
Burst Length .............................................................................................................................................. 41
Burst Type ................................................................................................................................................. 41
CAS Latency ............................................................................................................................................... 43
Operating Mode ......................................................................................................................................... 43
Write Burst Mode ....................................................................................................................................... 43
Extended Mode Register ................................................................................................................................. 44
Temperature-Compensated Self Refresh ..................................................................................................... 44
Partial-Array Self Refresh ............................................................................................................................ 45
Output Drive Strength ................................................................................................................................ 45
Bank/Row Activation ...................................................................................................................................... 46
READ Operation ............................................................................................................................................. 47
WRITE Operation ........................................................................................................................................... 56
Burst Read/Single Write .............................................................................................................................. 63
PRECHARGE Operation .................................................................................................................................. 64
Auto Precharge ........................................................................................................................................... 64
AUTO REFRESH Operation ............................................................................................................................. 76
SELF REFRESH Operation .............................................................................................................................. 78
Power-Down .................................................................................................................................................. 80
Deep Power-Down ......................................................................................................................................... 81
Clock Suspend ............................................................................................................................................... 82
Revision History ............................................................................................................................................. 85
Rev. B, Production – 3/11 ............................................................................................................................ 85
Rev. A, Preliminary – 2/11 ........................................................................................................................... 85
Contents
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Figure 1: 512Mb Mobile LPSDR Part Numbering .............................................................................................. 2
Figure 2: Functional Block Diagram ................................................................................................................. 8
Figure 3: 54-Ball VFBGA (Top View) ................................................................................................................. 9
Figure 4: 90-Ball VFBGA (Top View) ............................................................................................................... 10
Figure 5: 54-Ball VFBGA (8mm x 8mm) .......................................................................................................... 12
Figure 6: 90-Ball VFBGA (8mm x 13mm) ......................................................................................................... 13
Figure 7: Typical Self Refresh Current vs. Temperature .................................................................................. 19
Figure 8: ACTIVE Command .......................................................................................................................... 28
Figure 9: READ Command ............................................................................................................................. 29
Figure 10: WRITE Command ......................................................................................................................... 30
Figure 11: PRECHARGE Command ................................................................................................................ 31
Figure 12: Initialize and Load Mode Register .................................................................................................. 39
Figure 13: Mode Register Definition ............................................................................................................... 40
Figure 14: CAS Latency .................................................................................................................................. 43
Figure 15: Extended Mode Register Definition ................................................................................................ 44
Figure 16: Example: Meeting
t
RCD (MIN) When 2 <
t
RCD (MIN)/
t
CK < 3 ......................................................... 46
Figure 17: Consecutive READ Bursts .............................................................................................................. 48
Figure 18: Random READ Accesses ................................................................................................................ 49
Figure 19: READ-to-WRITE ............................................................................................................................ 50
Figure 20: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 51
Figure 21: READ-to-PRECHARGE .................................................................................................................. 51
Figure 22: Terminating a READ Burst ............................................................................................................. 52
Figure 23: Alternating Bank Read Accesses ..................................................................................................... 53
Figure 24: READ Continuous Page Burst ........................................................................................................ 54
Figure 25: READ – DQM Operation ................................................................................................................ 55
Figure 26: WRITE Burst ................................................................................................................................. 56
Figure 27: WRITE-to-WRITE .......................................................................................................................... 57
Figure 28: Random WRITE Cycles .................................................................................................................. 58
Figure 29: WRITE-to-READ ............................................................................................................................ 58
Figure 30: WRITE-to-PRECHARGE ................................................................................................................. 59
Figure 31: Terminating a WRITE Burst ........................................................................................................... 60
Figure 32: Alternating Bank Write Accesses .................................................................................................... 61
Figure 33: WRITE – Continuous Page Burst .................................................................................................... 62
Figure 34: WRITE – DQM Operation ............................................................................................................... 63
Figure 35: READ With Auto Precharge Interrupted by a READ ......................................................................... 65
Figure 36: READ With Auto Precharge Interrupted by a WRITE ....................................................................... 66
Figure 37: READ With Auto Precharge ............................................................................................................ 67
Figure 38: READ Without Auto Precharge ....................................................................................................... 68
Figure 39: Single READ With Auto Precharge .................................................................................................. 69
Figure 40: Single READ Without Auto Precharge ............................................................................................. 70
Figure 41: WRITE With Auto Precharge Interrupted by a READ ....................................................................... 71
Figure 42: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 71
Figure 43: WRITE With Auto Precharge .......................................................................................................... 72
Figure 44: WRITE Without Auto Precharge ..................................................................................................... 73
Figure 45: Single WRITE With Auto Precharge ................................................................................................ 74
Figure 46: Single WRITE Without Auto Precharge ........................................................................................... 75
Figure 47: Auto Refresh Mode ........................................................................................................................ 77
Figure 48: Self Refresh Mode ......................................................................................................................... 79
Figure 49: Power-Down Mode ....................................................................................................................... 80
Figure 50: Clock Suspend During WRITE Burst ............................................................................................... 82
List of Figures
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Figure 51: Clock Suspend During READ Burst ................................................................................................ 83
Figure 52: Clock Suspend Mode ..................................................................................................................... 84
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.