DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µ
PC8163TB
SILICON MMIC 2.0 GHz FREQUENCY UP-CONVERTER
FOR CELLULAR TELEPHONE
DESCRIPTION
The
µ
PC8163TB is a silicon monolithic integrated circuit designed as frequency up-converter for cellular telephone
transmitter stage. The
µ
PC8163TB has improved intermodulation performance and smaller package.
The
µ
PC8163TB is manufactured using NEC’s 20 GHz f
T
NESAT
TM
lll silicon bipolar process. This process uses
silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution
and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
•
•
•
•
•
Recommended operating frequency
Supply voltage
High-density surface mounting
Higher IP
3
Minimized carrier leakage
: f
RFout
= 0.8 GHz to 2.0 GHz, f
IFin
= 50 MHz to 300 MHz
: V
CC
= 2.7 to 3.3 V
: 6-pin super minimold package
: OIP
3
= +9.5 dBm @ f
RFout
= 830 MHz
: Due to double balanced mixer
APPLICATIONS
• Digital cellular phones
ORDERING INFORMATION
Part Number
Package
Supplying Form
Embossed tape 8 mm wide.
Pin 1, 2, 3 face to tape perforation side.
Qty 3 kp/reel
µ
PC8163TB-E3
6-pin super minimold
Remark
To order evaluation samples, please contact your local NEC sales office.
(Part number for sample order:
µ
PC8163TB)
Caution
Electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13636EJ2V0DS00 (2nd edition)
Date Published June 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1998, 1999
µ
PC8163TB
PIN CONNECTIONS
(Top View)
3
(Bottom View)
4
4
3
Pin No.
1
2
3
4
Pin Name
IFinput
GND
LOinput
GND
V
CC
RFoutput
2
C2Y
5
5
2
1
6
6
1
5
6
SERIES PRODUCTS (T
A
= +25°C, V
CC
= V
RFout
= 3.0 V, Z
L
= Z
S
= 50
Ω
)
Type
Part No.
V
CC
(V)
2.7 to
5.5
2.7 to
5.5
2.7 to
3.3
I
CC
(mA)
9
CG1
(dB)
9
CG2
(dB)
7
P
O(sat)
1
(dBm)
–2
P
O(sat)
2
(dBm)
–4
OIP
3
1
(dBm)
+5.5
OIP
3
2
(dBm)
+2.0
High IP
3
µ
PC8106TB
µ
PC8109TB
µ
PC8163TB
Low Power Consumption
5
6
4
–5.5
–7.5
+1.5
–1.0
Higher IP
3
16.5
9
5.5
0.5
–2
+9.5
+6.0
Caution
The above table lists the typical performance of each model. See ELECTRICAL CHARACTERISTICS for
the test conditions.
BLOCK DIAGRAM (FOR THE
µ
PC8163TB)
(Top View)
LOinput
GND
GND
V
CC
IFinput
RFoutput
2
Data Sheet P13636EJ2V0DS00
µ
PC8163TB
SYSTEM APPLICATION EXAMPLES (SCHEMATICS OF IC LOCATION IN THE SYSTEM)
RX
DEMO.
I
Q
VCO
SW
÷N
PLL
PLL
I
0˚
TX
PA
Phase
shifter
90˚
µ
PC8163TB
Q
Data Sheet P13636EJ2V0DS00
3
µ
PC8163TB
PIN EXPLANATION
Applied
Voltage
V
Pin
Voltage
V
Note
Pin
No.
1
Pin
Name
IFinput
Function and Explanation
Equivalent Circuit
1.2
This pin is IF input to double balanced mixer
(DBM). The input is designed as high
impedance. The circuit contributes to
suppress spurious signal. Also this
symmetrical circuit can keep specified
performance insensitive to process-condition
distribution. For above reason, double
balanced mixer is adopted.
GND pin. Ground pattern on the board
should be formed as wide as possible.
Track Length should be kept as short as
possible to minimize ground impedance.
Local input pin. Recommendable input level
is –10 to 0 dBm.
Supply voltage pin.
This pin is RF output from DBM. This pin is
designed as open collector. Due to the high
impedance output, this pin should be
externally equipped with LC matching circuit
to next stage.
3
5
6
2
4
GND
0
1
3
LOinput
2.1
5
6
V
CC
RFoutput
2.7 to 3.3
Same
bias as
V
CC
through
external
inductor
2
Note
Each pin voltage is measured with V
CC
= V
RFout
= 3.0 V.
4
Data Sheet P13636EJ2V0DS00
µ
PC8163TB
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Power Dissipation of Package
Symbol
V
CC
P
D
Test Conditions
T
A
= +25°C, Pin 5 and 6
Mounted on double-sided copperclad 50
×
50
×
1.6
mm epoxy glass PWB
T
A
= +85°C
Rating
3.6
200
Unit
V
mW
Operating Ambient Temperature
Storage Temperature
Maximum Input Power
T
A
T
stg
P
in
−40
to +85
−55
to +150
+10
°C
°C
dBm
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Symbol
V
CC
Test Conditions
The same voltage should be applied
to pin 5 and 6
MIN.
2.7
−40
Zs = 50
Ω
(without matching)
With external matching circuit
–10
0.8
50
TYP.
3.0
MAX.
3.3
Unit
V
Operating Ambient Temperature
Local Input Level
RF Output Frequency
IF Input Frequency
T
A
P
LOin
f
RFout
f
IFin
+25
–5
–
–
+85
0
2.0
300
°C
dBm
GHz
MHz
ELECTRICAL CHARACTERISTICS
(T
A
= +25°C, V
CC
= V
RFout
= 3.0 V, f
IFin
= 150 MHz, P
LOin
= –5 dBm)
°
Parameter
Circuit Current
Conversion Gain 1
Conversion Gain 2
Maximum RF Output Power 1
Maximum RF Output Power 2
Symbol
I
CC
CG1
CG2
P
O(sat)
1
P
O(sat)
2
No Signal
f
RFout
= 830 MHz, P
IFin
= –20 dBm
f
RFout
= 1.9 GHz, P
IFin
= –20 dBm
f
RFout
= 830 MHz, P
IFin
= 0 dBm
f
RFout
= 1.9 GHz, P
IFin
= 0 dBm
Conditions
MIN.
11.5
6
2.5
–1.5
–4.5
TYP.
16.5
9
5.5
0.5
–2
MAX.
23
12
8.5
–
–
Unit
mA
dB
dB
dBm
dBm
OTHER CHARACTERISTICS, FOR REFERENCE PURPOSES ONLY
(T
A
= +25°C, V
CC
= V
RFout
= 3.0 V, P
LOin
= –5 dBm)
°
Parameter
Input Third Order Distortion Intercept
Point
Output Third-Order Distortion
Intercept Point
SSB Noise Figure
Symbol
IIP
3
1
IIP
3
2
OIP
3
1
OIP
3
2
SSB NF
f
IFin
1 = 150.0 MHz
f
IFin
2 = 150.4 MHz
f
IFin
1 = 150.0 MHz
f
IFin
2 = 150.4 MHz
Conditions
f
RFout
= 830 MHz
f
RFout
= 1.9 GHz
f
RFout
= 830 MHz
f
RFout
= 1.9 GHz
Data
0.5
0.5
+9.5
+6.0
12.5
dB
dBm
Unit
dBm
f
RFout
= 830 MHz, f
IFin
= 150 MHz
Data Sheet P13636EJ2V0DS00
5
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