74AHC240-Q100;
74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
Rev. 1 — 6 November 2013
Product data sheet
1. General description
The 74AHC240-Q100 and 74AHCT240-Q100 are 8-bit inverting buffer/line drivers with
3-state outputs. These devices can be used as two 4-bit buffers or one 8-bit buffer. They
feature two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A
HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs are
over voltage tolerant. This feature allows the use of these devices as translators in mixed
voltage environments.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than V
CC
For 74AHC240-Q100 only: operates with CMOS input levels
For 74AHCT240-Q100 only: operates with TTL input levels
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
Multiple package options
NXP Semiconductors
74AHC240-Q100; 74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AHC240D-Q100
74AHCT240D-Q100
74AHC240PW-Q100
74AHCT240PW-Q100
74AHC240BQ-Q100
74AHCT240BQ-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP20
40 C
to +125
C
Name
SO20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
Version
SOT163-1
Type number
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
SOT764-1
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
20 terminals; body 2.5
4.5
0.85 mm
4. Functional diagram
1
EN
18
16
14
12
2
2
17
4
15
6
13
8
11
1
19
1A0
2A0
1A1
2A1
1A2
2A2
1A3
2A3
1OE
2OE
mgu779
1Y0 18
2Y0 3
1Y1 16
2Y1 5
4
6
8
19
1Y2 14
2Y2
7
11
13
15
17
EN
9
7
5
3
mgu778
1Y3 12
2Y3 9
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74AHC_AHCT240_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 6 November 2013
2 of 17
NXP Semiconductors
74AHC240-Q100; 74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration SO20 and TSSOP20
Fig 4.
Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Symbol
1OE
2OE
Pin description
Pin
1
19
Description
output enable input (active LOW)
output enable input (active LOW)
data input
data input
data output
data output
ground (0 V)
power supply
1A0, 1A1, 1A2, 1A3 2, 4, 6, 8
2A0, 2A1, 2A2, 2A3 17, 15, 13, 11
1Y0, 1Y1, 1Y2, 1Y3 18, 16, 14, 12
2Y0, 2Y1, 2Y2, 2Y3 3, 5, 7, 9
GND
V
CC
10
20
74AHC_AHCT240_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 6 November 2013
3 of 17
NXP Semiconductors
74AHC240-Q100; 74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
6. Functional description
Table 3.
Control
nOE
L
L
H
[1]
Function table
[1]
Input
nAn
L
H
X
Output
nYn
H
L
Z
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+7.0
+7.0
-
20
25
75
-
+150
500
Unit
V
V
mA
mA
mA
mA
mA
C
mW
V
I
<
0.5
V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
20
-
-
-
75
65
T
amb
=
40 C
to +125
C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO20 package: above 70
C
the value of P
tot
derates linearly with 8.0 mW/K.
For TSSOP20 package: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN20 package: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5 V
0.5 V
Conditions
Min
2.0
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
Unit
V
V
V
C
ns/V
ns/V
74AHC240-Q100
74AHC_AHCT240_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 6 November 2013
4 of 17
NXP Semiconductors
74AHC240-Q100; 74AHCT240-Q100
Octal buffer/line driver; inverting; 3-state
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
…continued
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 5 V
0.5 V
Conditions
Min
4.5
0
0
40
-
Typ
5.0
-
-
+25
-
Max
5.5
5.5
V
CC
+125
20
Unit
V
V
V
C
ns/V
74AHCT240-Q100
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC240-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
50 A;
V
CC
= 2.0 V
I
O
=
50 A;
V
CC
= 3.0 V
I
O
=
50 A;
V
CC
= 4.5 V
I
O
=
4.0
mA; V
CC
= 3.0 V
I
O
=
8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
OZ
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
0.25
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.80
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
2.5
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
10.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
OFF-state
V
I
= V
IH
or V
IL
;
output current V
O
= V
CC
or GND;
V
CC
= 5.5 V
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
output
capacitance
V
I
= V
CC
or GND
I
CC
C
I
C
O
-
-
-
-
3
4
4.0
10
-
-
-
-
40
10
-
-
-
-
80
10
-
A
pF
pF
74AHC_AHCT240_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 6 November 2013
5 of 17
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