DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD16341
96-BIT AC-PDP DRIVER
•
DESCRIPTION
The
µ
PD16341 is high withstand voltage CMOS driver designed for flat display panels such as PDPs, VFDs and
ELs. It consists of a 96-bit bi-directional shift register, 96-bit latch and high withstand voltage CMOS driver. The logic
block is designed to operate using a 5-V power supply interface enabling direct connection to a gate array or a
microcontroller. In addition, the
µ
PD16341 achieves low power dissipation by employing the CMOS structure while
having a high withstand voltage output (120 V, +15/−25 mA MAX.).
FEATURES
•
2-/3-/4-/6-ch input port switching is possible using IBS1 and IBS2 pins
•
Data control with transfer clock (external) and latch
•
High-speed data transfer (f
MAX.
=
40 MHz MIN. at data latch)
(f
MAX
.
=
25 MHz MIN. at cascade connection)
•
•
High withstand output voltage: 120 V, +15/–25 mA MAX.
•
5-V CMOS input interface
•
High withstand voltage CMOS structure
•
ORDERING INFORMATION
Part Number
Package
Module
µ
PD16341
Remark
Consult an NEC sales representative regarding the module. Since the module characteristics is
based on the module specifications, there may be differences between the contents written in this
document and real characteristics.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S14076EJ2V0DS00 (2nd edition)
Date Published March 2000 NS CP (K)
Printed in Japan
The mark
•
shows major revised points.
©
1999, 2000
µ
PD16341
1. BLOCK DIAGRAM (1) (IBS1 = H, IBS2 = H, 2-BIT INPUT, 48-BIT LENGTH SHIFT REGISTER)
HZ
/LBLK
/HBLK
V
DD2
/LE
A
1
CLK
R,/L
B
1
/CLR
A
2
SR
1
Note
S
1
A
1
S
3
CLK
R,/L
LE
S
1
S
2
/L
1
O
1
V
SS2
B
1
CLR S
95
SR
2
Note
S
2
A
2
S
4
CLK
R,/L
B
2
B
2
CLRS
96
V
DD2
S
95
S
96
/L
96
O
96
V
SS2
Note
SR
n
: 48-bit shift register
Remark
/xxx indicates active low signal.
2
Data Sheet S14076EJ2V0DS00
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
