The documentation and process conversion measures
necessary to comply with this document shall be
completed by 12 December 2013.
INCH-POUND
MIL-PRF-19500/448F
12 September 2013
SUPERSEDING
MIL-PRF-19500/448E
18 October 2011
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, LOW-POWER,
TYPE 2N4405, 2N4405UA, and 2N4405UB,
JAN AND JANTX
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for PNP, silicon, low-power transistors. Two
levels of product assurance are provided for each device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See
figure 1
(similar to TO-39),
figure 2
(UA), and
figure 3
(UB).
1.3 Maximum ratings T
A
= +25°C unless otherwise stated.
Types
P
T
(1)
T
C
= +25°C
W
2N4405
2N4405UA
2N4405UB
Types
5.0
N/A
N/A
V
CBO
V dc
2N4405
2N4405UA
2N4405UB
80
80
80
P
T
(1)
T
A
= +25°C
W
1.0
N/A
N/A
V
CEO
V dc
80
80
80
P
T
(1)
T
SP(IS)
= +25°C
W
N/A
1.0
1.0
V
EBO
V dc
5
5
5
P
T
(1)
T
SP(AM)
= +25°C
W
N/A
4
N/A
I
C
A dc
0.5
0.5
0.5
R
θ
JC
(2)
°C/W
35
N/A
N/A
R
θ
JA
(2)
°C/W
175
N/A
N/A
R
θ
JSP(IS)
(2)
°C/W
N/A
110
90
R
θ
JSP(AM)
(2)
°C/W
N/A
40
N/A
T
STG
and T
J
°C
-65 to +200
-65 to +200
-65 to +200
(1) See figures 4, 5, 6, 7, and 8.
(2) For thermal impedance, see figures 9, 10, 11, 12, and 13.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dla.mil.
Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at
https://assist.dla.mil
.
AMSC N/A
FSC 5961
MIL-PRF-19500/448F
1.4 Primary electrical characteristics T
A
= +25°C unless otherwise stated.
Limit
h
FE1
(1)
h
FE3
(1)
V
BE(SAT)2
(1)
V
CE(SAT)3
(1)
C
obo
|h
fe
|
V
CE
= 5 V dc
I
C
= 100
µA
dc
V
CE
= 5 V dc
I
C
= 150 mA
dc
I
C
= 500 mA
dc
I
B
= 50 mA dc
V dc
I
C
= 500 mA dc
I
B
= 50 mA dc
V
CB
= 10 V dc
I
E
= 0 mA dc
100 kHz
≤
f
≤1
MHz
pF
V
CE
= 20 V dc
I
C
= 50 mA dc
f = 100 MHz
V dc
Min
Max
75
100
300
0.85
1.20
0.5
20
2.0
6.0
(1) Pulsed (see
4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
-
Semiconductor Devices, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750
-
Test Methods for Semiconductor Devices.
* (Copies of these documents are available online at
http://quicksearch.dla.mil
or
https://assist.dla.mil
or from the
Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/448F
Symbol
CD
CH
HD
LC
LD
LL
LU
L1
L2
P
Q
r
TL
TW
α
Dimensions
Inches
Millimeters
Min.
Max.
Min.
Max.
.305
.335
7.75
8.51
.24
.26
6.1
6.6
.335
.37
8.51
9.4
.200 TP
5.08 TP
.016
.021
.41
.53
.500
.750
12.70 19.05
.016
.019
.41
.48
.050
1.27
.250
6.35
.100
2.54
.040
1.02
.007
.18
.029
.045
.74
1.14
.028
.034
.71
.86
45° TP
45° TP
Notes
4
2, 5
5
3, 5
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Measured in the zone beyond .250 (6.35) from the seating plane.
4. Measured in the zone .050 (1.27 mm) and .250 (6.35) from the seating plane.
5. Measured from the maximum diameter of the actual case.
6. All three leads.
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
8. Lead 1 is the emitter, lead 2 is the base, and lead 3 is the collector, which is electrically connected to the
case.
FIGURE 1. Physical dimensions for 2N4405 (similar to TO-39).
3
MIL-PRF-19500/448F
Symbol
BL
BL2
BW
BW2
CH
L3
LH
LL1
LL2
LS
LW
LW2
Pin no.
Transistor
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.215
.225
5.46
5.71
.225
5.71
.145
.155
3.68
3.93
.155
3.93
.061
.075
1.55
1.90
.003
0.08
.029
.042
0.74
1.07
.032
.048
0.81
1.22
.072
.088
1.83
2.23
.045
.055
1.14
1.39
.022
.028
0.56
0.71
.006
.022
0.15
0.56
1
Collector
2
Emitter
3
Base
Note
3
5
5
4
N/C
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension "CH" controls the overall package thickness. When a window lid is used, dimension "CH" must
increase by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
4. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown on the
drawing.
* 5. Dimensions "LW2" minimum and "L3" minimum and the appropriate castellation length define an unobstructed
three-dimensional space traversing all of the ceramic layers in which a castellation was designed.
(Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension "LW2" maximum
define the maximum width and depth of the castellation at any point on its surface. Measurement of these
dimensions may be made prior to solder dipping.
6. The coplanarity deviation of all terminal contact points, as defined by the device seating plane, shall not exceed
.006 inch (0.15mm) for solder dipped leadless chip carriers.
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
* FIGURE 2. Physical dimensions, surface mount (UA version).
4
MIL-PRF-19500/448F
UB
Ltr.
BH
BL
BW
CL
CW
LL1
LL2
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.046
.056
1.17
1.42
.115
.128
2.92
3.25
.085
.108
2.16
2.74
.128
3.25
.108
2.74
.022
.038
0.56
0.96
.017
.035
0.43
0.89
Note
Ltr.
LS1
LS2
LW
r
r1
r2
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.035
.040
0.89
1.02
.071
.079
1.80
2.01
.016
.024
0.41
0.61
.008
0.20
.012
0.31
.022
0.56
Note
NOTES:
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Hatched areas on package denote metallized areas.
4. Lid material: Kovar.
5. Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Pad 4 = Shielding connected to the lid.
6. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 3. Physical dimensions, surface mount (UB version).
5
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