NM27C020 2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
NM27C020
July 1997
NM27C020
2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
General Description
The NM27C020 is a high speed 2 Megabit CMOS UV-
EPROM manufactured on Fairchild’s advanced sub-micron
technology. Utilizing the AMG* architecture, this advanced
CMOS process delivers high speeds while consuming low
power.
The NM27C020 provides microprocessor-based systems
extensive storage capacity for large portions of operating
systems and application software. Its 80ns access time pro-
vides no-wait-state operation with high-performance CPUs.
The NM27C020 offers a single chip solution for the code
storage requirements of 100
firmware-based equipment. Frequently-used software rou-
tines are quickly executed from EPROM storage, greatly en-
hancing system utility.
The NM27C020 is manufactured using Fairchild’s advanced
CMOS AMG EPROM technology, and is one member of a
high density Fairchild EPROM series family which range in
densities up to 4Mb.
Features
n
High performance CMOS
— 80 ns access time
n
Simplified upgrade path
— V
PP
and PGM are “Don’t Care” during normal read
operation
n
Manufacturers identification code
n
JEDEC Standard Pin Configuration
— 32-pin DIP package
— 32-pin TSOP package
— 32-pin PLCC package
Block Diagram
DS010835-1
© 1997 Fairchild Semiconductor Corporation
DS010835
www.fairchildsemi.com
1
PrintDate=1997/08/27 PrintTime=12:38:12 9696 ds010835 Rev. No. 3
cmserv
Proof
1
Connection Diagrams
DS010835-10
Note:
Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27C020 pins.
Commercial Temperature Range
(0˚C to +70˚C) V
CC
= 5V
±
10%
Parameter/Order Number
NM27C020 Q, V, T, N 80
NM27C020 Q, V, T, N 90
NM27C020 Q, V, T, N 100
NM27C020 Q, V, T, N 120
NM27C020 Q, V, T, N 150
NM27C020 Q, V, T, N 200
Access Time (ns)
80
90
100
120
150
200
PLCC Pin Configuration
All versions are guaranteed to function at slower speeds.
Extended Temperature Range
(−40˚C to +85˚C) V
CC
= 5V
±
10%
Parameter/Order Number
NM27C020 QE, VE, TE, NE
100
NM27C020 QE, VE, TE, NE
120
NM27C020 QE, VE, TE, NE
150
Access Time (ns)
100
120
150
DS010835-3
Top View
Pin Names
A
0
–A
17
CE
OE
O
0
–O
7
PGM
XX
Addresses
Chip Enable
Output Enable
Outputs
Program
Don’t Care (During Read)
www.fairchildsemi.com
2
PrintDate=1997/08/27 PrintTime=12:38:14 9696 ds010835 Rev. No. 3 cmserv
Proof
2
Connection Diagrams
(Continued)
Ordering Information
DS010835-9
3
www.fairchildsemi.com
PrintDate=1997/08/27 PrintTime=12:38:14 9696 ds010835 Rev. No. 3 cmserv
Proof
3
Absolute Maximum Ratings
Storage Temperature
All Input Voltage Except A
9
with
Respect to Ground (Note 13)
V
PP
and A
9
with Respect to Ground
V
CC
Supply Voltage with
Respect to Ground
ESD Protection
All Output Voltages with
(Note 1)
Respect to Ground (Note 13)
V
CC
+ 10V to GND −0.6V
−65˚C to +125˚C
−0.6V to +7V
−0.6V to +14V
−0.6V to +7V
>
2000V
Operating Range
Range
Commercial
Industrial
Temperature
0˚C to +70˚C
−40˚C to +85˚C
V
CC
+5V
+5V
Tolerance
±
10
±
10%
DC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
V
IL
V
IH
V
OL
V
OH
I
SB1
(Note
4)
I
SB2
I
CC
(Note
2)
Parameter
Input Low Level
Input High Level
Output Low Voltage
Output High Voltage
V
CC
Standby Current (CMOS)
V
CC
Standby Current (TTL)
V
CC
Active Current
I
OL
= 2.1 mA
I
OH
= −400 µA
CE = V
CC
±
0.3V
CE = V
IH
CE, OE = V
IL
I/O = 0 mA, f = 5 MHz
I
PP
V
PP
I
LI
I
LO
V
PP
Supply Current
V
PP
Read Voltage
Input Load Current
Output Leakage Current
V
IN
= 5.5 or GND
V
OUT
= 5.5V or GND
Inputs = V
IH
or V
IL
V
PP
= V
CC
V
CC
− 0.4
−1
−10
Test Conditions
Min
−0.5
2.0
3.5
100
1
Commercial
Industrial
30
10
V
CC
1
10
µA
V
µA
µA
30
mA
Max
0.8
V
CC
+ 1
−0.4
Units
V
V
V
V
µA
mA
AC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
t
ACC
t
CE
t
OE
t
DF
(Note 3)
t
OH
Parameter
Min
Address to Output Delay
CE to Output Delay
OE to Output Delay
Output Disable to Output Float
Output Hold from Addresses, CE
or OE , Whichever Occurred First
0
80*
Max
80
80
35
35
0
Min
90
Max
90
90
40
40
0
Min
100
Max
100
100
45
45
0
Min
120
Max
120
120
50
50
Units
ns
ns
ns
ns
ns
Note 1:
Stresses above those listed under
″Absolute
Maximum Ratings″ may cause permanent damage to the device. This is a stress rating only and functional op-
eration of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods of time may affect device reliability.
Note 2:
The supply current is the sum of ICC and IPP. The maximum current value is with Outputs O0 to O7 unloaded.
Note 3:
This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven-see timing diagram.
Note 4:
CMOS inputs: VIL = GND 10.3V, VIH= VCC 10.3V.
* 80ns is within 30 PF load
www.fairchildsemi.com
4
PrintDate=1997/08/27 PrintTime=12:38:15 9696 ds010835 Rev. No. 3 cmserv
Proof
4
AC Read Characteristics
(Continued)
I
CC
vs Frequency
DS010835-7
Frequency (MHz)
I
CC
vs Temperature
DS010835-8
Temperature (!C)
5
www.fairchildsemi.com
PrintDate=1997/08/27 PrintTime=12:38:16 9696 ds010835 Rev. No. 3 cmserv
Proof
5