Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
FEATURES
•
10-bit resolution
•
Sampling rate up to 50 MHz
•
DC sampling allowed
•
One clock cycle conversion only
•
High signal-to-noise ratio over a large analog input
frequency range (9.4 effective bits at 4.43 MHz
full-scale input at f
clk
= 40 MHz)
•
No missing codes guaranteed
•
In-Range (IR) CMOS output
•
Levels TTL and CMOS compatible digital inputs
•
3 to 5 V CMOS digital outputs
•
Low-level AC clock input signal allowed
•
External reference voltage regulator
•
Power dissipation only 175 mW (typical)
•
Low analog input capacitance, no buffer amplifier
required
•
No sample-and-hold circuit required.
APPLICATIONS
TDA8763A
High-speed analog-to-digital conversion for:
•
Video data digitizing
•
Radar pulse analysis
•
Transient signal analysis
•
High energy physics research
• Σ∆
modulators
•
Medical imaging.
GENERAL DESCRIPTION
The TDA8763A is a 10-bit high-speed low-power
analog-to-digital converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary-coded digital words at a maximum
sampling rate of 50 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.
The device requires an external source to drive its
reference ladder. If the application requires that the
reference is driven via internal sources the
recommendation is to use the TDA8763.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA8763AM/3
TDA8763AM/4
TDA8763AM/5
SSOP28
SSOP28
SSOP28
plastic shrink small outline package; 28 leads;
body width 5.3 mm
DESCRIPTION
VERSION
SOT341-1
SOT341-1
SOT341-1
SAMPLING
FREQUENCY (MHz)
30
40
50
1999 Jan 06
2
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
PINNING
SYMBOL
CLK
TC
V
CCA
AGND
n.c.
V
RB
V
RM
V
I
V
RT
OE
V
CCD2
DGND2
V
CCO
OGND
n.c.
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
IR
DGND1
V
CCD1
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
clock input
twos complement input (active LOW)
analog supply voltage (+5 V)
analog ground
not connected
reference voltage BOTTOM input
reference voltage MIDDLE input
analog input voltage
reference voltage TOP input
output enable input (CMOS level
input, active LOW)
digital supply voltage 2 (+5 V)
digital ground 2
supply voltage for output stages
(3 to 5 V)
output ground
not connected
data output; bit 0 (LSB)
data output; bit 1
data output; bit 2
data output; bit 3
data output; bit 4
data output; bit 5
data output; bit 6
data output; bit 7
data output; bit 8
data output; bit 9 (MSB)
in range data output
digital ground 1
digital supply voltage 1 (+5 V)
handbook, halfpage
handbook, halfpage
TDA8763A
DESCRIPTION
CLK
TC
VCCA
AGND
n.c.
VRB
VRM
VI
VRT
1
2
3
4
5
6
7
28 VCCD1
27 DGND1
26 IR
25 D9
24 D8
23 D7
22 D6
TDA8763A
8
9
21 D5
20 D4
19 D3
18 D2
17 D1
16 D0
15 n.c.
MBG914
OE 10
V CCD2 11
DGND2 12
V CCO 13
OGND 14
Fig.2 Pin configuration.
1999 Jan 06
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
