IDT74FCT162344AT/CT/ET
FAST CMOS ADDRESS/CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
ADDRESS/CLOCK
DRIVER
FEATURES:
•
•
•
•
•
•
•
IDT74FCT162344AT/CT/ET
DESCRIPTION:
0.5 MICRON CMOS Technology
Ideal for address line driving and clock distribution
8 banks with 1:4 fanout and 3-state
Typical t
SK(o)
(Output Skew) < 500ps
Balanced Output Drivers (±24mA)
Reduced system switching noise
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 5V ± 10%
• Low input and output leakage
≤
1µA (max.)
• Available in SSOP and TSSOP packages
The FCT162344T is a 1:4 address/clock driver built using advanced dual
metal CMOS technology. This high-speed, low power device provides the
ability to fanout to memory arrays. Eight banks, each with a fanout of 4, and
3-state control provide efficient address distribution. One or more banks may
be used for clock distribution.
The FCT162344T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot and controlled output fall
times reducing the need for external series terminating resistors.
A large number of power and ground pins and TTL output swings also ensure
reduced noise levels. All inputs are designed with hysteresis for improved noise
margins.
FUNCTIONAL BLOCK DIAGRAM
OE
1
1
OE
3
29
2
B
11
A
5
36
34
B
51
A
1
8
6
B
14
30
B
54
9
B
21
A
6
42
41
B
61
A
2
14
13
B
24
37
B
64
OE
2
28
OE
4
56
16
B
31
A
7
43
48
B
71
A
3
15
20
B
34
44
B
74
23
B
41
A
8
49
55
B
81
A
4
21
27
B
44
51
B
84
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
MAY 2002
1
DSC-3069/6
© 2002 Integrated Device Technology, Inc.
IDT74FCT162344AT/CT/ET
FAST CMOS ADDRESS/CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
OE1
B
11
B
12
GND
B
13
B
14
V
CC
A
1
B
21
B
22
GND
B
23
B
24
A
2
A
3
B
31
B
32
GND
B
33
B
34
A
4
V
CC
B
41
B
42
GND
B
43
B
44
OE2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OE4
B
81
B
82
GND
B
83
B
84
V
CC
A
8
B
71
B
72
GND
B
73
B
74
A
7
A
6
B
61
B
62
GND
B
63
B
64
A
5
V
CC
B
51
B
52
GND
B
53
B
54
OE3
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals terminals for FCT162XXX.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
OEx
Ax
Bxx
Inputs
3-State Outputs
Description
3-State Output Enable Inputs (Active LOW)
FUNCTION TABLE
(1)
Inputs
OEx
L
L
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
Outputs
Ax
L
H
X
Bxx
L
H
Z
SSOP/ TSSOP
TOP VIEW
2
IDT74FCT162344AT/CT/ET
FAST CMOS ADDRESS/CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current (Input pins)
(4)
Input HIGH Current (I/O pins)
(4)
I
IL
Input LOW Current (Input pins)
(4)
Input LOW Current (I/O pins)
(4)
I
OZH
I
OZL
V
IK
I
OS
V
H
I
CCL
I
CCH
I
CCZ
High Impedance Output Current
(3-State Output pins)
(4)
Clamp Diode Voltage
Short Circuit Current
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
—
V
CC
= Max.
V
O
= 2.7V
V
O
= 0.5V
V
I
= GND
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
Min.
2
—
—
—
—
—
—
—
—
–80
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
–0.7
–140
100
5
Max.
—
0.8
±1
±1
±1
±1
±1
±1
–1.2
–250
—
500
V
mA
mV
µA
µA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
ODL
I
ODH
V
OH
V
OL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= 5V
,
V
IN =
V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= 5V
,
V
IN =
V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= Min
I
OH
= –24mA
V
IN
= V
IH
or V
IL
V
CC
= Min
I
OH
= 24mA
V
IN
= V
IH
or V
IL
Min.
60
–60
2.4
—
Typ.
(2)
115
–115
3.3
0.3
Max.
200
–200
—
0.55
Unit
mA
mA
V
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT74FCT162344AT/CT/ET
FAST CMOS ADDRESS/CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OEx
= GND
One Input Bit Toggling
Four Output Bits Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OEx
= GND
One Input Bit Toggling
Four Output Bits Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OEx
= GND
Eight Input Bits Toggling
Thirty-Two Output Bits Toggling
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
170
Max.
1.5
220
Unit
mA
µA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.7
2.7
mA
—
2
3.5
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
3.4
4.9
(5)
—
5.4
10.9
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
fi = Input Frequency
Ni = Number of Inputs at fi
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK1(o)
t
SK2(o)
Parameter
Propagation Delay
A
X
to B
XX
Output Enable Time
OE
X
to B
X
Output Disable Time
OE
X
to B
X
Skew between outputs of same bank
and same package (same transition)
(3)
Skew between outputs of all banks
of same package (A1 thru A8 tied together)
(3)
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
FCT1622344AT
Min.
(2)
Max.
1.5
4.8
1.5
1.5
—
—
6.2
5.6
0.5
0.5
FCT162344CT
Min.
(2)
Max.
1.5
4.3
1.5
1.5
—
—
5.8
5.2
0.35
0.5
FCT162344ET
Min.
(2)
Max.
1.5
3.8
1.5
1.5
—
—
5
4.6
0.25
0.5
Unit
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4
IDT74FCT162344AT/CT/ET
FAST CMOS ADDRESS/CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500
Ω
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OU
T
50pF
C
L
500
Ω
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
t
SU
t
H
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
t
REM
1.5V
t
SU
t
H
Pulse Width
Set-up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPU
T
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
O
L
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
V
O
L
CONTROL
INPUT
t
PZ
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
L
t
PL
3.5V
1.5V
Z
t
PLH
t
PHL
3V
1.5V
0V
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
V
OH
Propagation Delay
3V
1.5V
0V
V
OH
1.5V
V
O
V
OH
1.5V
V
O
L
L
Enable and Disable Times
INPUT
t
PLH1
t
PHL1
OUTPUT 1
t
SK1(o
)
t
SK1(o
)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
OUTPUT 2
t
PHL2
t
SKn(o)
= |t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PLH1
|
t
PLH2
Output Skew – t
SKn(o)
NOTES:
1. For t
SK1(o)
OUTPUT1 and OUTPUT2 are in the same bank.
2. For t
SK2(o)
OUTPUT1 and OUTPUT2 are in different banks on the same part.
5
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