SUF1002
Dual N-ch Trench MOSFET
30V, 5.8A N-channel Trench MOSFET
Features
Low drain-source On-resistance:
R
DS(on)
=24mΩ @V
GS
=10V, I
D
=2.9A
Low gate charge: Q
g
=79.5nC (Typ.)
High power and current handing capability
Lead free product is acquired
SOP-8
Ordering Information
Part Number
Marking Code
Package
Packaging
SUF1002
SUF1002
SOP-8
Tape & Reel
Marking and Pin Assignment
SUF1002
YWW
Column 1: Device Code
Column 2: Production Information
- YWW: Year & Week Code
Absolute Maximum Ratings
Characteristic
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (Pulsed) *
Total power dissipation
1)
3)
3)
2)
(T
amb
=25℃, Unless otherwise noted)
Symbol
V
DSS
V
GSS
I
D
I
DP
P
D
I
AS
E
AS
I
AR
E
AR
T
j
T
stg
Ratings
30
20
5.8
23.2
3
5.8
72
5.8
3.4
150
-55 ~ 150
Unit
V
V
A
A
W
A
mJ
A
mJ
C
C
Avalanche current (Single)
Single pulsed avalanche energy
Avalanche current (Repetitive)
Repetitive avalanche energy
2)
Operating junction temperature
Storage temperature range
* Limited by maximum junction temperature
Rev. date: 29-OCT-13
KSD-T7F001-001
www.auk.co.kr
1 of 8
SUF1002
Thermal Characteristics
(T
amb
=25℃, Unless otherwise noted)
Characteristic
Thermal resistance, junction to ambient
1)
Symbol
R
th(j-a)
Ratings
62.5
Unit
C/W
Electrical Characteristics
(T
amb
=25℃, Unless otherwise noted)
Characteristic
Drain-source breakdown voltage
Gate threshold voltage
Drain-source cut-off current
Gate leakage current
Drain-source on-resistance
Forward transfer conductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Fall time
4, 5)
4, 5)
4, 5)
5)
Symbol
BV
DSS
V
GS(th)
I
DSS
I
GSS
R
DS(ON)
g
fs
Ciss
Coss
Crss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Test Condition
I
D
=250uA, V
GS
=0
I
D
=250uA, V
DS
=V
GS
V
DS
=30V, V
GS
=0V
V
DS
=0V, V
GS
=20V
V
GS
=10V, I
D
=2.9A
V
GS
=5V, I
D
=2.9A
V
DS
=5V, I
D
=5.8A
V
GS
=0V, V
DS
=10V,
f=1MHz
Min.
30
1
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
-
-
-
24
28
12
370
60
36
1.2
1.1
2.5
1.1
4.2
0.9
1.4
Max.
-
3
1
100
30
34
-
560
90
54
-
-
-
-
6.3
1.4
2.1
Unit
V
V
uA
nA
m
S
pF
Turn-off delay time
4, 5)
V
DS
=15V, I
D
=5.8A,
R
G
=10Ω
ns
Total gate charge
4, 5)
4, 5)
Gate-source charge
Gate-drain charge
4, 5)
V
DS
=15V, V
GS
=5V
I
D
=18A
-
-
nC
Source-Drain Diode Rating and Characteristics
(T
amb
=25℃, Unless otherwise specified)
Characteristic
Maximum diode forward current
Source current (Pulsed)
Forward voltage
5)
2)
Symbol
Is
I
SM
V
SD
t
rr
Q
rr
Test Condition
Integral reverse diode
in the MOSFET
V
GS
=0V, I
S
=1A
I
S
=1.5A, di
s
/d
t
=100A/us
Min.
-
-
-
-
-
Typ.
-
-
-
90
0.5
Max.
1.5
6
1
-
-
Unit
A
A
V
Ns
uC
Reverse recovery time
Reverse recovery charge
* Note:
1) Device mounted on a glass-epoxy board
2) Repetitive rating: Pulse width limited by maximum junction temperature.
3) L=3.4mH, I
AS
=5.8A, V
DD
=15V, R
G
=25
4) Pulse Test: Pulse width
≤
300us, Duty cycle
≤
2%.
5) Essentially independent of operating temperature
Rev. date: 29-OCT-13
KSD-T7F001-001
www.auk.co.kr
2 of 8
SUF1002
Electrical Characteristic Curves
Fig. 1 I
D
- V
DS
Fig. 2 I
D
- V
GS
Fig. 3 R
DS(on)
- I
D
℃
Fig. 4 I
S
- V
SD
Fig. 5 Capacitance - V
DS
Fig. 6 V
GS
- Q
G
℃
Rev. date: 29-OCT-13
KSD-T7F001-001
www.auk.co.kr
3 of 8
SUF1002
Fig. 7 V
DSS
- T
J
Fig. 8 R
DS(on)
- T
J
C
C
Fig. 9 I
D
- T
a
Fig. 10 Safe Operating Area
*
t
Rev. date: 29-OCT-13
KSD-T7F001-001
www.auk.co.kr
4 of 8
Fig. 11 Gate Charge Test Circuit & Waveform
SUF1002
Fig. 12 Resistive Switching Test Circuit & Waveform
=
Fig. 13 E
AS
Test Circuit & Waveform
Rev. date: 29-OCT-13
KSD-T7F001-001
www.auk.co.kr
5 of 8
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