DATA SHEET
µ
PD70F3003A, 70F3025A
V853
TM
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
µ
PD70F3003A and
µ
PD70F3025A have a flash memory instead of the internal mask ROM of the
µ
PD703003A/
703004A and
µ
PD703025A, respectively. This model is useful for small-scale production of a variety of application
sets or early start of production since the program can be written and erased by the user even with the
µ
PD70F3003
mounted on the board.
Functions in detail are described in the following user’s manuals. Be sure to read these manuals when
you design your systems.
V853 User’s Manual-Hardware
: U10913E
V850 Family
TM
User’s Manual-Architecture : U10243E
FEATURES
• Compatible with
µ
PD703003A, 703004A and 703025A
• Can be replaced with mask ROM model for mass production of application set
µ
PD70F3003A
→
µ
PD703003A, 703004A
µ
PD70F3025A
→
µ
PD703025A
• Internal memory
Flash memory: 128K bytes (
µ
PD70F3003A)
256K bytes (
µ
PD70F3025A)
Remark
For differences among the products, refer to
1. DIFFERENCES AMONG PRODUCT.
ORDERING INFORMATION
Part Number
Package
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
Maximum Operating Frequency (MHz)
25
33
25
33
µ
PD70F3003AGC-25-8EU
µ
PD70F3003AGC-33-8EU
µ
PD70F3025AGC-25-8EU
Note
µ
PD70F3025AGC-33-8EU
Note
Note
Under development
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U13189EJ3V0DS00 (3rd edition)
Date Published May 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1998
µ
PD70F3003A, 70F3025A
PIN CONFIGURATION (Top View)
• 100-Pin Plastic LQFP (fine pitch) (14
×
14 mm)
µ
PD70F3003AGC-25-8EU
µ
PD70F3003AGC-33-8EU
µ
PD70F3025AGC-25-8EU
µ
PD70F3025AGC-33-8EU
P30/TO130
P27/SCK1
P26/RXD1/SI1
P25/TXD1/SO1
P24/SCK0
P23/RXD0/SI0
P22/TXD0/SO0
P21/PWM1
P20/PWM0
NMI
V
DD
V
SS
P17/INTP123/SCK2
P16/INTP122/SI2
P15/INTP121/SO2
P14/INTP120
P13/TI12
P12/TCLR12
P11/TO121
P10/TO120
AV
DD
AV
SS
AV
REF1
P77/ANI7
P76/ANI6
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
Caution Connect V
PP
pin to V
SS
pin except the case that
µ
PD70F3003A or 70F3025A is used in flash
memory programming mode.
2
P43/AD3
P42/AD2
V
SS
V
DD
P41/AD1
P40/AD0
P90/LBEN
P91/UBEN
P92/R/W
P93/DSTB
P94/ASTB
P95/HLDAK
P96/HLDRO
WAIT
V
PP
MODE
RESET
CV
DD
/CKSEL
X2
X1
CV
SS
CLKOUT
V
SS
V
DD
P110/TO140
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
P31/TO131
P32/TCLR13
P33/TI13
P34/INTP130
P35/INTP131/SO3
P36/INTP132/SI3
P37/INTP133/SCK3
P63/A19
P62/A18
P61/A17
P60/A16
V
SS
V
DD
P57/AD15
P56/AD14
P55/AD13
P54/AD12
P53/AD11
P52/AD10
P51/AD9
P50/AD8
P47/AD7
P46/AD6
P45/AD5
P44/AD4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
ANO0
ANO1
AV
REF2
AV
REF3
P07/INTP113/ADTRG
P06/INTP112
P05/INTP111
P04/INTP110
P03/TI11
P02/TCLR11
P01/TO111
P00/TO110
P117/INTP143
P116/INTP142
P115/INTP141
P114/INTP140
P113/TI14
P112/TCLR14
P111/TO141
Data Sheet U13189EJ3V0DS00
µ
PD70F3003A, 70F3025A
PIN NAMES
A16-A19
AD0-AD15
ADTRG
ANI0-ANI7
ANO0, ANO1
ASTB
AV
DD
AV
REF1
-AV
REF3
AV
SS
CV
DD
CV
SS
CKSEL
CLKOUT
DSTB
HLDAK
HLDRQ
INTP120-INTP123,
INTP130-INTP133,
INTP140-INTP143
LBEN
MODE
NMI
P00-P07
P10-P17
P20-P27
P30-P37
: Lower Byte Enable
: Mode
: Non-maskable Interrupt Request
: Port0
: Port1
: Port2
: Port3
: Address Bus
: Address/Data Bus
: AD Trigger Input
: Analog Input
: Analog Output
: Address Strobe
: Analog V
DD
: Analog Reference Voltage
: Analog V
SS
: Power Supply for Clock Generator
: Ground for Clock Generator
: Clock Select
: Clock Output
: Data Strobe
: Hold Acknowledge
: Hold Request
P40-P47
P50-P57
P60-P63
P70-P77
P90-P96
P110-P117
PWM0, PWM1
RESET
R/W
RXD0, PXD1
SCK0-SCK3
SI0-SI3
SO0-SO3
TO110, TO111,
TO120, TO121,
TO130, TO131,
TO140, TO141
TCLR11-TCLR14
TI11-TI14
TXD0, TXD1
UBEN
WAIT
X1, X2
V
DD
V
PP
V
SS
: Timer Clear
: Timer Input
: Transmit Data
: Upper Byte Enable
: Wait
: Crystal
: Power Supply
: Programming Power Supply
: Ground
: Port4
: Port5
: Port6
: Port7
: Port9
: Port11
: Pulse Width Modulation
: Reset
: Read/Write Status
: Receive Data
: Serial Clock
: Serial Input
: Serial Output
: Timer Output
INTP110-INTP113, : Interrupt Request from Peripherals
Data Sheet U13189EJ3V0DS00
3
µ
PD70F3003A, 70F3025A
INTERNAL BLOCK DIAGRAM
Flash memory
NMI
INTP110-INTP113
INTP120-INTP123
INTP130-INTP133
INTP140-INTP143
TO110, TO111
TO120, TO121
TO130, TO131
TO140, TO141
TCLR11-TCLR14
TI11-TI14
Note 2
SIO
SO0/TXD0
SI0/RXD0
SCK0
UART0/CSI0
INTC
Note 1
PC
32-bit
barrel shifter
System
register
CPU
Instruction
queue
Multiplier
16
×
16
→
32
BCU
ASTB
DSTB
R/W
UBEN
LBEN
WAIT
A16-A19
AD0-AD15
HLDRQ
HLDAK
RPU
RAM
General-
purpose
register
32 bits
×
32
ALU
BRG0
SO1/TXD1
SI1/RXD1
SCK1
CKSEL
CLKOUT
X1
X2
MODE
RESET
V
DD
V
SS
CV
DD
SO3
SI3
SCK3
PWM0, PWM1
CSI3
CV
SS
V
PP
UART1/CSI1
A/D
Converter
ANI0-ANI7
AV
REF1
AV
SS
AV
DD
ADTRG
D/A
Converter
ANO0, ANO1
AV
REF2
, AV
REF3
Ports
P110-P117
P90-P96
P70-P77
P60-P63
P50-P57
P40-P47
P30-P37
P20-P27
P10-P17
P00-P07
CG
BRG1
SO2
SI2
SCK2
CSI2
BRG2
PWM
Notes 1.
µ
PD70F3003A : 128K bytes
µ
PD70F3025A: 256K bytes
2.
µ
PD70F3003A: 4K bytes
µ
PD70F3025A: 8K bytes
4
Data Sheet U13189EJ3V0DS00
µ
PD70F3003A, 70F3025A
CONTENTS
1. DIFFERENCES AMONG PRODUCTS ······························································································ 6
2. PIN FUNCTIONS ································································································································ 7
2.1 Port Pins ·····················································································································································
2.2 Pins Other Than Port Pins ························································································································
7
9
2.3 I/O Circuits of Pins and Recommended Connections of Unused Pins ················································ 11
3. ELECTRICAL SPECIFICATIONS ······································································································· 14
3.1 Normal Operation Mode ···························································································································· 14
3.2 Flash Memory Programming Mode ·········································································································· 35
4. PACKAGE DRAWING ······················································································································· 37
5. RECOMMENDED SOLDERING CONDITIONS ················································································· 38
Data Sheet U13189EJ3V0DS00
5