UPD70F3033AGC-8EU,UPD70F3033AGC-8EU pdf中文资料,UPD70F3033AGC-8EU引脚图,UPD70F3033AGC-8EU电路-Datasheet-电子工程世界

DATA SHEET

µ

PD703031A, 703031AY, 703033A,

703033AY, 70F3033A, 70F3033AY

V850/SB1

32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

TM

MOS INTEGRATED CIRCUIT

DESCRIPTION

The

µ

PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY (V850/SB1) are 32-/16-bit

single-chip microcontrollers of the V850 Family

TM

for AV equipment. 32-bit CPU, ROM, RAM, timer/counters, serial

interfaces, A/D converter, DMA controller, and so on are integrated on a single chip.

The

µ

PD70F3033A and 70F3033AY have flash memory in place of the internal mask ROM of the

µ

PD703033A

and 703033AY. Because flash memory allows the program to be written and erased electrically with the device

mounted on the board, these products are ideal for the evaluation stages of system development, small-scale

production, and rapid development of new products.

Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before

designing.

TM

V850/SB1, V850/SB2 User’s Manual Hardware: U13850E

V850 Family User’s Manual Architecture:

U10243E

FEATURES

{

Number of instructions: 74

{

Minimum instruction execution time: 50 ns (@ internal 20 MHz operation)

{

General-purpose registers: 32 bits

×

32 registers

{

Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions,

load/store instructions

{

Memory space: 16 MB linear address space

{

Internal memory ROM: 128 KB (

µ

PD703031A, 703031AY: mask ROM)

256 KB (

µ

PD703033A, 703033AY: mask ROM)

256 KB (

µ

PD70F3033A, 70F3033AY: flash memory)

RAM: 12 KB (

µ

PD703031A, 703031AY)

16 KB (

µ

PD703033A, 703033AY, 70F3033A, 70F3033AY)

{

Interrupt/exception:

µ

PD703031A, 703033A, 70F3033A (external: 8, internal: 30 sources, exception: 1 source)

µ

PD703031AY, 703033AY, 70F3033AY (external: 8, internal: 31 sources, exception: 1 source)

{

I/O lines Total: 83

{

Timer/counters: 16-bit timer (2 channels: TM0, TM1)

8-bit timer (6 channels: TM2 to TM7)

{

Watch timer: 1 channel

{

Watchdog timer: 1 channel

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. U14734EJ1V0DS00 (1st edition)

Date Published April 2000 N CP(K)

Printed in Japan

©

2000

µ

PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY

{

Serial interface

•

Asynchronous serial interface (UART0, UART1)

•

Clocked serial interface (CSI0 to CSI3)

•

3-wire variable length serial interface (CSI4)

2

•

I C bus interface (I C0, I C1) (

µ

PD703031AY, 703033AY, 70F3033AY only)

{

10-bit resolution A/D converter: 12 channels

{

DMA controller: 6 channels

{

Real-time output port: 8 bits

×

1 channel or 4 bits

×

2 channels

{

ROM correction: 4 places can be corrected

{

Power-saving function: HALT/IDLE/STOP modes

{

Packages: 100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic QFP (14

×

20)

{

µ

PD70F3033A, 70F3033AY

•

Can be replaced with

µ

PD703033A and 703033AY (internal mask ROM) in mass production

APPLICATIONS

{

AV equipment (audio, car audio, VCR, TV, etc.)

ORDERING INFORMATION

Part Number

×××-8EU

µ

PD703031AGC-×××

×××

×××-8EU

µ

PD703031AYGC-×××

×××

×××-3BA

µ

PD703031AGF-×××

×××

×××-3BA

µ

PD703031AYGF-×××

×××

×××-8EU

µ

PD703033AGC-×××

×××

×××-8EU

µ

PD703033AYGC-×××

×××

×××-3BA

µ

PD703033AGF-×××

×××

×××-3BA

µ

PD703033AYGF-×××

×××

Note

µ

PD70F3033AGC-8EU

Package

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic QFP (14

×

20)

100-pin plastic QFP (14

×

20)

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic QFP (14

×

20)

100-pin plastic QFP (14

×

20)

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic LQFP (fine pitch) (14

×

14)

100-pin plastic QFP (14

×

20)

100-pin plastic QFP (14

×

20)

Internal ROM

Mask ROM (128 KB)

Mask ROM (256 KB)

Flash memory (256 KB)

µ

PD70F3033AYGC-8EU

µ

PD70F3033AGF-3BA

µ

PD70F3033AYGF-3BA

Note

Under development

Remarks 1.

×××

indicates ROM code suffix.

2.

ROMless versions are not provided.

2

Data Sheet U14734EJ1V0DS00

µ

PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY

PIN CONFIGURATION (Top View)

100-pin plastic LQFP (fine pitch) (14

×

14)

•

µ

PD703031AGC-×××-8EU

•

µ

PD703031AYGC-×××-8EU

•

µ

PD703033AGC-×××-8EU

•

µ

PD703033AYGC-×××-8EU

•

µ

PD70F3033AGC-8EU

•

µ

PD70F3033AYGC-8EU

P21/SO2

P22/SCK2/SCL1

Note 2

P23/RXD1/SI3

P24/TXD1/SO3

P25/ASCK1/SCK3

EV

DD

EV

SS

P26/TI2/TO2

P27/TI3/TO3

P30/TI00

P31/TI01

P32/TI10/SI4

P33/TI11/SO4

P34/TO0/A13/SCK4

P35/TO1/A14

P36/TI4/TO4/A15

P37/TI5/TO5

IC/V

PP

Note 1

P100/RTP0/KR0/A5

P101/RTP1/KR1/A6

P102/RTP2/KR2/A7

P103/RTP3/KR3/A8

P104/RTP4/KR4/A9

P105/RTP5/KR5/A10

P106/RTP6/KR6/A11

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

P20/SI2/SDA1

Note 2

P15/SCK1/ASCK0

P14/SO1/TXD0

P13/SI1/RXD0

P12/SCK0/SCL0

Note 2

P11/SO0

P10/SI0/SDA0

Note 2

P07/INTP6

P06/INTP5/RTPTRG

P05/INTP4/ADTRG

P04/INTP3

P03/INTP2

P02/INTP1

P01/INTP0

P00/NMI

P83/ANI11

P82/ANI10

P81/ANI9

P80/ANI8

P77/ANI7

P76/ANI6

P75/ANI5

P74/ANI4

P73/ANI3

P72/ANI2

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

P71/ANI1

P70/ANI0

AV

REF

AV

SS

AV

DD

P65/A21

P64/A20

P63/A19

P62/A18

P61/A17

P60/A16

P57/AD15

P56/AD14

P55/AD13

P54/AD12

P53/AD11

P52/AD10

P51/AD9

P50/AD8

BV

SS

BV

DD

P47/AD7

P46/AD6

P45/AD5

P44/AD4

Notes 1.

2.

IC: Connect directly to V

SS

(

µ

PD703031A, 703031AY, 703033A, 703033AY).

V

PP

: Connect to V

SS

in normal operation mode (

µ

PD70F3033A, 70F3033AY).

SCL0, SCL1, SDA0, and SDA1 are available only in the

µ

PD703031AY, 703033AY,

and 70F3033AY.

P107/RTP7/KR7/A12

P110/WAIT/A1

P111/A2

P112/A3

P113/A4

RESET

XT1

XT2

REGC

X2

X1

V

SS

V

DD

CLKOUT

P90/LBEN/WRL

P91/UBEN

P92/R/W/WRH

P93/DSTB/RD

P94/ASTB

P95/HLDAK

P96/HLDRQ

P40/AD0

P41/AD1

P42/AD2

P43/AD3

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

Data Sheet U14734EJ1V0DS00

3

µ

PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY

100-pin plastic QFP (14

×

20)

•

µ

PD703031AGF-×××-3BA

•

µ

PD703031AYGF-×××-3BA

•

µ

PD703033AGF-×××-3BA

•

µ

PD703033AYGF-×××-3BA

•

µ

PD70F3033AGF-3BA

•

µ

PD70F3033AYGF-3BA

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

P13/SI1/RXD0

P12/SCK0/SCL0

Note 2

P11/SO0

P10/SI0/SDA0

Note 2

P07/INTP6

P06/INTP5/RTPTRG

P05/INTP4/ADTRG

P04/INTP3

P03/INTP2

P02/INTP1

P01/INTP0

P00/NMI

P83/ANI11

P82/ANI10

P81/ANI9

P80/ANI8

P77/ANI7

P76/ANI6

P75/ANI5

P74/ANI4

Notes 1.

2.

IC: Connect directly to V

SS

(

µ

PD703031A, 703031AY, 703033A, 703033AY).

V

PP

: Connect to V

SS

in normal operation mode (

µ

PD70F3033A, 70F3033AY).

SCL0, SCL1, SDA0, and SDA1 are available only in the

µ

PD703031AY, 703033AY,

and 70F3033AY.

4

P111/A2

P112/A3

P113/A4

RESET

XT1

XT2

REGC

X2

X1

V

SS

V

DD

CLKOUT

P90/LBEN/WRL

P91/UBEN

P92/R/W/WRH

P93/DSTB/RD

P94/ASTB

P95/HLDAK

P96/HLDRQ

P40/AD0

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

P14/SO1/TXD0

P15/SCK1/ASCK0

P20/SI2/SDA1

Note 2

P21/SO2

P22/SCK2/SCL1

Note 2

P23/RXD1/SI3

P24/TXD1/SO3

P25/ASCK1/SCK3

EV

DD

EV

SS

P26/TI2/TO2

P27/TI3/TO3

P30/TI00

P31/TI01

P32/TI10/SI4

P33/TI11/SO4

P34/TO0/A13/SCK4

P35/TO1/A14

P36/TI4/TO4/A15

P37/TI5/TO5

IC/V

PP

Note 1

P100/RTP0/KR0/A5

P101/RTP1/KR1/A6

P102/RTP2/KR2/A7

P103/RTP3/KR3/A8

P104/RTP4/KR4/A9

P105/RTP5/KR5/A10

P106/RTP6/KR6/A11

P107/RTP7/KR7/A12

P110/WAIT/A1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

P73/ANI3

P72/ANI2

P71/ANI1

P70/ANI0

AV

REF

AV

SS

AV

DD

P65/A21

P64/A20

P63/A19

P62/A18

P61/A17

P60/A16

P57/AD15

P56/AD14

P55/AD13

P54/AD12

P53/AD11

P52/AD10

P51/AD9

P50/AD8

BV

SS

BV

DD

P47/AD7

P46/AD6

P45/AD5

P44/AD4

P43/AD3

P42/AD2

P41/AD1

Data Sheet U14734EJ1V0DS00

µ

PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY

PIN IDENTIFICATION

A1 to A21:

AD0 to AD15:

ADTRG:

ANI0 to ANI11:

ASCK0, ASCK1:

ASTB:

AV

DD

:

AV

REF

:

AV

SS

:

BV

DD

:

BV

SS

:

CLKOUT:

DSTB:

EV

DD

:

EV

SS

:

HLDAK:

HLDRQ:

IC:

INTP0 to INTP6:

KR0 to KR7:

LBEN:

NMI:

P00 to P07:

P10 to P15:

P20 to P27:

P30 to P37:

P40 to P47:

P50 to P57:

P60 to P65:

P70 to P77:

Address Bus

Address/Data Bus

AD Trigger Input

Analog Input

Asynchronous Serial Clock

Address Strobe

Analog Power Supply

Analog Reference Voltage

Analog Ground

Power Supply for Bus Interface

Ground for Bus Interface

Clock Output

Data Strobe

Power Supply for Port

Ground for Port

Hold Acknowledge

Hold Request

Internally Connected

Interrupt Request from Peripherals

Key Return

Lower Byte Enable

Non-Maskable Interrupt Request

Port 0

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

Port 7

P80 to P83:

P90 to P96:

P100 to P107:

P110 to P113:

RD:

REGC:

RESET:

RTP0 to RTP7:

RTPTRG:

R/W:

RXD0, RXD1:

SCK0 to SCK4:

SCL0, SCL1:

SDA0, SDA1:

SI0 to SI4:

SO0 to SO4:

TI00, TI01, TI10, :

TI11, TI2 to TI5

TO0 to TO5:

TXD0, TXD1:

UBEN:

V

DD

:

V

PP

:

V

SS

:

WAIT:

WRH:

WRL:

X1, X2:

XT1, XT2:

Timer Output

Transmit Data

Upper Byte Enable

Power Supply

Programming Power Supply

Ground

Wait

Write Strobe High Level Data

Write Strobe Low Level Data

Crystal for Main Clock

Crystal for Sub-clock

Port 8

Port 9

Port 10

Port 11

Read

Regulator Clock

Reset

Real-time Output Port

RTP Trigger Input

Read/Write Status

Receive Data

Serial Clock

Serial Data

Serial Input

Serial Output

Timer Input

Data Sheet U14734EJ1V0DS00

5

UPD70F3033AGC-8EU

UPD70F3033AGC-8EU概述

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