PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUITS
µ
PD70F3102-33
V850E/MS1
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
TM
The
µ
PD70F3102-33 is a product that substitutes the internal mask ROM of the
µ
PD703102-33 with flash
memory. This enables users to perform on-board program writing and erasure, enabling effective evaluation during
system development, small-lot production of multiple devices, and rapid production start, and quick development and
time-to-market.
A version using a 3.3 V power supply for external pins, the
µ
PD70F3102-A33, is also available.
For additional information, refer to the following user’s manuals. Be sure to read them before starting
design.
V850E/MS1 User’s Manual Hardware:
U12688E
V850E/MS1 User’s Manual Architecture: U12197E
FEATURES
•
µ
PD703102-33 compatible
Can be replaced by the
µ
PD703102-33 with internal mask ROM for mass production
•
Internal flash memory: 128 KB
ORDERING INFORMATION
Part Number
Package
144-pin plastic LQFP (fine pitch) (20
×
20)
144-pin plastic LQFP (fine pitch) (20
×
20)
µ
PD70F3102GJ-33-8EU
µ
PD70F3102GJ-33-UEN
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U13844EJ2V0DS00 (2nd edition)
Date Published July 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1999
µ
PD70F3102-33
PIN CONFIGURATION (Top View)
144-pin plastic LQFP (fine pitch) (20
×
20)
•
µ
PD70F3102GJ-33-8EU
•
µ
PD70F3102GJ-33-UEN
V
DD
D0/P40
D1/P41
D2/P42
D3/P43
D4/P44
D5/P45
D6/P46
D7/P47
V
SS
D8/P50
D9/P51
D10/P52
D11/P53
D12/P54
D13/P55
D14/P56
D15/P57
HV
DD
A0/PA0
A1/PA1
A2/PA2
A3/PA3
A4/PA4
A5/PA5
A6/PA6
A7/PA7
V
SS
A8/PB0
A9/PB1
A10/PB2
A11/PB3
A12/PB4
A13/PB5
A14/PB6
A15/PB7
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
INTP103/DMARQ3/P07
INTP102/DMARQ2/P06
INTP101/DMARQ1/P05
INTP100/DMARQ0/P04
TI10/P03
TCLR10/P02
TO101/P01
TO100/P00
V
SS
INTP113/DMAAK3/P17
INTP112/DMAAK2/P16
INTP111/DMAAK1/P15
INTP110/DMAAK0/P14
TI11/P13
TCLR11/P12
TO111/P11
TO110/P10
INTP123/TC3/P107
INTP122/TC2/P106
INTP121/TC1/P105
INTP120/TC0/P104
TI12/P103
TCLR12/P102
TO121/P101
TO120/P100
ANI7/P77
ANI6/P76
ANI5/P75
ANI4/P74
ANI3/P73
ANI2/P72
ANI1/P71
ANI0/P70
AV
DD
AV
SS
AV
REF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
A16/P60
A17/P61
A18/P62
A19/P63
A20/P64
A21/P65
A22/P66
A23/P67
HV
DD
CS0/RAS0/P80
CS1/RAS1/P81
CS2/RAS2/P82
CS3/RAS3/P83
CS4/RAS4/IOWR/P84
CS5/RAS5/IORD/P85
CS6/RAS6/P86
CS7/RAS7/P87
LCAS/LWR/P90
UCAS/UWR/P91
RD/P92
WE/P93
BCYST/P94
OE/P95
HLDAK/P96
HLDRQ/P97
V
SS
REFRQ/PX5
WAIT/PX6
CLKOUT/PX7
TO150/P120
TO151/P121
TCLR15/P122
TI15/P123
INTP150/P124
INTP151/P125
INTP152/P126
2
NMI/P20
P21
TXD0/SO0/P22
RXD0/SI0/P23
SCK0/P24
TXD1/SO1/P25
RXD1/SI1/P26
SCK1/P27
V
DD
INTP133/SCK2/P37
INTP132/SI2/P36
INTP131/SO2/P35
INTP130/P34
TI13/P33
TCLR13/P32
TO131/P31
TO130/P30
INTP143/SCK3/P117
INTP142/SI3/P116
INTP141/SO3/P115
INTP140/P114
TI14/P113
TCLR14/P112
TO141/P111
TO140/P110
CV
DD
X2
X1
CV
SS
CKSEL
MODE0
MODE1
MODE2
MODE3/V
PP
RESET
INTP153/ADTRG/P127
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Preliminary Data Sheet U13844EJ2V0DS00
µ
PD70F3102-33
PIN IDENTIFICATION
A0 to A23:
ADTRG:
ANI0 to ANI7:
AV
DD:
AV
REF
:
AV
SS
:
BCYST:
CKSEL:
CLKOUT:
CS0 to CS7:
CV
DD
:
CV
SS
:
D0 to D15:
Address Bus
AD Trigger Input
Analog Input
Analog Power Supply
Analog Reference Voltage
Analog Ground
Bus Cycle Start Timing
Clock Generator Operating Mode
Select
Clock Output
Chip Select
Clock Generator Power Supply
Clock Generator
Data Bus
P50 to P57:
P60 to P67:
P70 to P77:
P80 to P87:
P90 to P97:
P100 to P107:
P110 to P117:
P120 to P127:
PA0 to PA7:
PB0 to PB7:
PX5 to PX7:
RAS0 to RAS7:
RD:
REFRQ:
RESET:
RXD0, RXD1:
SCK0 to SCK3:
SI0 to SI3:
SO0 to SO3:
TC0 to TC3:
TI10 to TI15:
TO100, TO101,
TO110, TO111,
Interrupt Request from Peripherals TO120, TO121,
I/O Read Strobe
I/O Write Strobe
Lower Column Address Strobe
Lower Write Strobe
Mode
Output Enable
Port 0
Port 1
Port 2
Port 3
Port 4
TO130, TO131,
TO140, TO141,
TO150, TO151:
TXD0, TXD1:
UCAS:
V
DD
:
V
PP
:
V
SS
:
WAIT:
WE:
X1, X2:
Timer Output
Transmit Data
Upper Column Address Strobe
Upper Write Strobe
Power Supply for Internal Unit
Programming Power Supply
Ground
Wait
Write Enable
Crystal
Port 5
Port 6
Port 7
Port 8
Port 9
Port 10
Port 11
Port 12
Port A
Port B
Port X
Row Address Strobe
Read
Refresh Request
Reset
Receive Data
Serial Clock
Serial Input
Serial Output
Terminal Count Signal
Timer Input
DMAAK0 to DMAAK3: DMA Acknowledge
DMARQ0 to DMARQ3: DMA Request
HLDAK:
HLDRQ:
HV
DD
:
INTP100 to INTP103,
INTP110 to INTP113,
INTP120 to INTP123,
INTP130 to INTP133,
INTP140 to INTP143,
INTP150 to INTP153:
IORD:
IOWR:
LCAS:
LWR:
MODE0 to MODE3:
NMI:
OE:
P00 to P07:
P10 to P17:
P20 to P27:
P30 to P37:
P40 to P47:
Hold Acknowledge
Hold Request
Power Supply for External Pins
TCLR10 to TCLR15: Timer Clear
Non-Maskable Interrupt Request UWR:
Preliminary Data Sheet U13844EJ2V0DS00
3
µ
PD70F3102-33
INTERNAL BLOCK DIAGRAM
NMI
INTP100 to INTP103,
INTP110 to INTP113,
INTP120 to INTP123,
INTP130 to INTP133,
INTP140 to INTP143,
INTP150 to INTP153
Flash memory
INTC
Instruction queue
128 KB
PC
TO100, TO101,
TO110, TO111,
TO120, TO121,
TO130, TO131,
TO140, TO141,
TO150, TO151
TCLR10 to TCLR15
TI10 to TI15
4 KB
Barrel
shifter
RPU
RAM
System registers
Multiplier
(32
×
32
→
64)
DRAMC
CPU
BCU
HLDRQ
HLDAK
CS0 to CS7/RAS0 to RAS7
IOWR
IORD
REFRQ
BCYST
WE
RD
Page ROM
controller
OE
UWR/UCAS
LWR/LCAS
General-purpose
registers
(32 bits
×
32)
ALU
DMAC
SIO
SO0/TXD0
SI0/RXD0
SCK0
UART0/CSI0
WAIT
A0 to A23
D0 to D15
DMARQ0 to DMARQ3
DMAAK0 to DMAAK3
TC0 to TC3
BRG0
SO1/TXD1
SI1/RXD1
SCK1
CKSEL
CLKOUT
CG
X1
X2
CV
DD
CV
SS
UART1/CSI1
Port
BRG1
P90 to P97
P80 to P87
P70 to P77
P60 to P67
P50 to P57
P40 to P47
P30 to P37
P21 to P27
P10 to P17
PX5 to PX7
PB0 to PB7
PA0 to PA7
P120 to P127
P110 to P117
SO2
SI2
SCK2
CSI2
P100 to P107
P00 to P07
HV
DD
P20
BRG2
SO3
SI3
SCK3
System
controller
MODE0 to MODE3
RESET
V
PP
CSI3
V
DD
ANI0 to ANI7
AV
REF
AV
SS
AV
DD
ADTRG
ADC
V
SS
4
Preliminary Data Sheet U13844EJ2V0DS00
µ
PD70F3102-33
CONTENTS
1. DIFFERENCES AMONG PRODUCTS ..............................................................................................
1.1 Differences Between
µ
PD70F3102-33 and
µ
PD703102-33 ......................................................
1.2 Differences Between
µ
PD70F3102-33 and
µ
PD70F3102A-33..................................................
2. PIN
2.1
2.2
2.3
6
6
6
FUNCTIONS................................................................................................................................. 7
Port Pins ...................................................................................................................................... 7
Non-Port Pins .............................................................................................................................. 10
Pin I/O Circuit Types and Recommended Connection of Unused Pins ................................ 14
17
17
18
18
3. FLASH MEMORY PROGRAMMING .................................................................................................
3.1 Selection of Communication System........................................................................................
3.2 Flash Memory Programming Functions ...................................................................................
3.3 Connecting the Dedicated Flash Programmer.........................................................................
4. ELECTRICAL SPECIFICATIONS....................................................................................................... 19
4.1 Normal Operation Mode ............................................................................................................. 19
4.2 Flash Memory Programming Mode ........................................................................................... 74
5. PACKAGE DRAWINGS...................................................................................................................... 76
6. RECOMMENDED SOLDERING CONDITIONS................................................................................. 78
Preliminary Data Sheet U13844EJ2V0DS00
5