Data Sheet
FEATURES
Filterless Class-D amplifier with spread-spectrum
Σ-Δ modulation
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion (THD + N)
93% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
>100 dB signal-to-noise ratio (SNR)
High PSSR at 217 Hz: 80 dB
Flexible gain adjustment pin: 0 dB to 12 dB in 3 dB steps
Fixed input impedance: 80 kΩ
User-selectable ultralow EMI emissions mode
Single-supply operation from 2.5 V to 5.5 V
20 nA shutdown current
Short-circuit and thermal protection with autorecovery
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Filterless, High Efficiency,
Mono 3 W Class-D Audio Amplifier
SSM2375
Spread-spectrum pulse density modulation (PDM) is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures. The inherent randomized nature of
spread-spectrum PDM eliminates the clock intermodulation
(beating effect) of several amplifiers in close proximity.
The SSM2375 includes an optional modulation select pin
(ultralow EMI emissions mode) that significantly reduces the
radiated emissions at the Class-D outputs, particularly above
100 MHz. In ultralow EMI emissions mode, the SSM2375
can pass FCC Class B radiated emission testing with 50 cm,
unshielded speaker cable without any external filtering.
The device also includes a highly flexible gain select pin that
allows the user to select a gain of 0 dB, 3 dB, 6 dB, 9 dB, or
12 dB. The gain selection feature improves gain matching
between multiple SSM2375 devices within a single application
as compared to using external resistors to set the gain.
The SSM2375 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying
a logic low to the SD pin.
The device also includes pop-and-click suppression circuitry.
This suppression circuitry minimizes voltage glitches at the
output during turn-on and turn-off, reducing audible noise
on activation and deactivation.
Other features that simplify system-level integration of the
SSM2375 include input low-pass filtering to suppress out-of-band
DAC noise interference to the PDM modulator and fixed-input
impedance to simplify component selection across multiple
platform production builds.
The SSM2375 is specified over the industrial temperature range
of −40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a halide-free, 9-ball,
1.5 mm × 1.5 mm wafer level chip scale package (WLCSP).
APPLICATIONS
Mobile phones
MP3 players
Portable electronics
GENERAL DESCRIPTION
The
SSM2375
is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 3 W of continuous output power
with <1% THD + N driving a 3 Ω load from a 5.0 V supply.
The SSM2375 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. The modulation
continues to provide high efficiency even at low output power.
The SSM2375 operates with 93% efficiency at 1.4 W into 8 Ω
or with 85% efficiency at 3 W into 3 Ω from a 5.0 V supply and
has an SNR of >100 dB.
10µF
0.1µF
FUNCTIONAL BLOCK DIAGRAM
POWER SUPPLY
2.5V TO 5.5V
VDD
OUT+
IN+
22nF
SHUTDOWN
IN–
GAIN
CONTROL
MODULATOR
(Σ-Δ)
FET
DRIVER
OUT–
SSM2375
22nF
IN+
IN–
BIAS
SD
GAIN
R
GAIN
INTERNAL
OSCILLATOR
EDGE
CONTROL
EDGE
GND
EMISSION
CONTROL
GAIN SELECT
GAIN = 0dB, 3dB, 6dB, 9dB, OR 12dB
Figure 1.
Rev. A
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09011-001
SSM2375* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DESIGN RESOURCES
•
SSM2375 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
EVALUATION KITS
•
SSM2375 Evaluation Board
DOCUMENTATION
Data Sheet
•
SSM2375: Filterless, High Efficiency, Mono 3 W Class-D
Audio Amplifier Data Sheet
User Guides
•
UG-196: Evaluation Board for SSM2375 Filterless Class-D
Audio Amplifier
DISCUSSIONS
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SSM2375
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Typical Application Circuits.......................................................... 12
Data Sheet
Theory of Operation ...................................................................... 13
Overview ..................................................................................... 13
Gain Selection ............................................................................. 13
Pop-and-Click Suppression ...................................................... 13
EMI Noise.................................................................................... 13
Output Modulation Description .............................................. 13
Layout .......................................................................................... 14
Input Capacitor Selection .......................................................... 14
Power Supply Decoupling ......................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
REVISION HISTORY
4/13—Rev. 0 to Rev. A
Changes to Figure 33 and Figure 34............................................. 12
Changes to Gain Selection Section and Table 5 ......................... 13
Updated Outline Dimensions ....................................................... 15
9/10—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
SPECIFICATIONS
V
DD
= 5.0 V, T
A
= 25°C, R
L
= 8 Ω +33 µH, EDGE = GND, unless otherwise noted.
Table 1.
Parameter
DEVICE CHARACTERISTICS
Output Power
Symbol
P
O
Test Conditions/Comments
f = 1 kHz, 20 kHz BW
R
L
= 8 Ω, THD = 1%, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 1%, V
DD
= 3.6 V
R
L
= 8 Ω, THD = 1%, V
DD
= 2.5 V
R
L
= 8 Ω, THD = 10%, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 10%, V
DD
= 3.6 V
R
L
= 8 Ω, THD = 10%, V
DD
= 2.5 V
R
L
= 4 Ω, THD = 1%, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 1%, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 1%, V
DD
= 2.5 V
R
L
= 4 Ω, THD = 10%, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 10%, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 10%, V
DD
= 2.5 V
R
L
= 3 Ω, THD = 1%, V
DD
= 5.0 V
R
L
= 3 Ω, THD = 1%, V
DD
= 3.6 V
R
L
= 3 Ω, THD = 1%, V
DD
= 2.5 V
R
L
= 3 Ω, THD = 10%, V
DD
= 5.0 V
R
L
= 3 Ω, THD = 10%, V
DD
= 3.6 V
R
L
= 3 Ω, THD = 10%, V
DD
= 2.5 V
P
O
= 1.4 W into 8 Ω, V
DD
= 5.0 V
P
O
= 1 W into 8 Ω, f = 1 kHz, V
DD
= 5.0 V
P
O
= 0.5 W into 8 Ω, f = 1 kHz, V
DD
= 3.6 V
1.0
V
CM
= 2.5 V ± 100 mV, f = 217 Hz, output referred
Gain = 6 dB
Guaranteed from PSRR test
Inputs are ac-grounded, C
IN
= 0.1 µF
V
RIPPLE
= 100 mV at 217 Hz
V
RIPPLE
= 100 mV at 1 kHz
V
IN
= 0 V, no load, V
DD
= 5.0 V
V
IN
= 0 V, no load, V
DD
= 3.6 V
V
IN
= 0 V, no load, V
DD
= 2.5 V
V
IN
= 0 V, R
L
= 8 Ω + 33 µH, V
DD
= 5.0 V
V
IN
= 0 V, R
L
= 8 Ω + 33 µH, V
DD
= 3.6 V
V
IN
= 0 V, R
L
= 8 Ω + 33 µH, V
DD
= 2.5 V
SD = GND
2.5
80
80
3.0
2.7
2.5
3.1
2.8
2.6
20
0
SD = VDD, fixed input impedance (0 dB to 12 dB)
1.35
80
12
55
250
0.1
Min
Typ
SSM2375
Max
Unit
Efficiency
Total Harmonic Distortion + Noise
Input Common-Mode Voltage
Range
Common-Mode Rejection Ratio
Average Switching Frequency
Differential Output Offset Voltage
POWER SUPPLY
Supply Voltage Range
Power Supply Rejection Ratio
η
THD + N
V
CM
CMRR
GSM
f
SW
V
OOS
V
DD
PSRR
1.42
0.72
0.33
1.77
0.91
0.42
2.52
1.28
0.56
3.17
1
1.6
0.72
3.2
1
1.52
0.68
3.7
1
1.9
0.85
93
0.01
0.01
V
DD
− 1
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
%
%
%
V
dB
kHz
mV
V
dB
dB
mA
mA
mA
mA
mA
mA
nA
dB
kΩ
V
V
ms
µs
kΩ
2.0
5.5
Supply Current
I
SY
Shutdown Current
GAIN CONTROL
Closed-Loop Gain
Input Impedance
SHUTDOWN CONTROL
Input Voltage High
Input Voltage Low
Turn-On Time
Turn-Off Time
Output Impedance
I
SD
Gain
Z
IN
V
IH
V
IL
t
WU
t
SD
Z
OUT
0.35
SD rising edge from GND to VDD
SD falling edge from VDD to GND
SD = GND
Rev. A | Page 3 of 16
12.5
5
>100
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