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5962G9653503VXC

产品描述D Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14
产品类别逻辑    逻辑   
文件大小326KB,共27页
制造商Cobham PLC
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5962G9653503VXC概述

D Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14

5962G9653503VXC规格参数

参数名称属性值
厂商名称Cobham PLC
包装说明DFP, FL14,.25
Reach Compliance Codeunknown
ECCN代码3A001.A.1.A
系列ACT
JESD-30 代码R-CDFP-F14
JESD-609代码e4
长度8.626 mm
负载电容(CL)50 pF
逻辑集成电路类型D FLIP-FLOP
最大I(ol)0.008 A
位数1
功能数量2
端子数量14
最高工作温度125 °C
最低工作温度-55 °C
输出极性COMPLEMENTARY
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DFP
封装等效代码FL14,.25
封装形状RECTANGULAR
封装形式FLATPACK
电源3.3/5 V
Prop。Delay @ Nom-Sup20 ns
传播延迟(tpd)30 ns
认证状态Qualified
筛选级别MIL-PRF-38535 Class V
座面最大高度2.575 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)3 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层GOLD
端子形式FLAT
端子节距1.27 mm
端子位置DUAL
总剂量500k Rad(Si) V
触发器类型POSITIVE EDGE
宽度6.477 mm

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REVISIONS
LTR
A
B
DESCRIPTION
Changes in accordance with NOR 5962-R142-97.
Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements.
– LTG
Correct the title to accurately describe the device function. Add device types
02
and 03. Add appendix A. Change figure 4, switching waveforms and test
circuit. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak
Add note 9/ to section 1.5 for device types 02 and 03. Add footnote 6/ to
table IB and remove table III, Irradiation test connections. - jak
Correct terminal connections for pin number 8, 9 and 10 in figure 1 and update
boilerplate to current MIL-PRF-38535 requirements. Add information to
footnote 6/ in section 1.5.- MAA
Add equivalent test circuit and footnote 5 in figure 4. Update radiation features
in section 1.5 and SEP table IB - MAA
DATE (YR-MO-DA)
96-12-10
01-09-04
APPROVED
Monica L. Poelking
Thomas M. Hess
C
07-12-13
Thomas M. Hess
D
08-05-05
Thomas M. Hess
E
08-10-17
Thomas M. Hess
F
12-05-10
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
F
17
F
18
REV
SHEET
PREPARED BY
Thanh V. Nguyen
CHECKED BY
Thanh V. Nguyen
F
19
F
20
F
21
F
1
F
22
F
2
F
23
F
3
F
24
F
4
F
25
F
5
F
6
F
7
F
8
F
9
F
10
F
11
F
12
F
13
F
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
APPROVED BY
Monica L. Poelking
DRAWING APPROVAL DATE
96-04-12
REVISION LEVEL
MICROCIRCUIT, DIGITAL, ADVANCED CMOS,
RADIATION HARDENED, DUAL D FLIP-FLOP
WITH CLEAR AND PRESET, TTL COMPATIBLE
INPUTS, MONOLITHIC SILICON
SIZE
A
CAGE CODE
F
67268
SHEET
5962-96535
1 OF 25
DSCC FORM 2233
APR 97
5962-E293-12

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