DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78361A, 78362A
16/8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
µ
PD78362A is provided with a high-speed, high-performance CPU and powerful operation functions. Unlike the
existing
µ
PD78328,
µ
PD78362A is also provided with a high-resolution PWM signal output function which
substantially contributes to improving the performance of the inverter control.
A PROM model,
µ
PD78P364A, is also available.
Detailed functions, etc. are described in the following user's manual. Be sure to read the manual to design
systems.
µ
PD78362A User's Manual Hardware : U10745E
µ
PD78356 User’s Manual Instruction : U12117E
FEATURES
•
Internal 16-bit architecture, external 8-bit data bus
•
High-speed processing by pipeline control method and high- speed operating clock
⋅
Minimum instruction execution time: 125 ns (internal clock: at 16 MHz, external clock: 8MHz)
•
Real-time pulse unit for inverter control
•
10-bit resolution A/D converter: 8 channels
•
8-/9-/10-/12-bit resolution variable PWM signal output function: 2 channels
•
Powerful serial interface: 2 channels
•
Internal memory : ROM
RAM
32K bytes (
µ
PD78361A)
24K bytes (
µ
PD78362A)
2K bytes
(
µ
PD78361A)
768 bytes (
µ
PD78362A)
APPLICATION EXAMPLES
•
Inverter air conditioner
•
Factory automation fields, such as industrial robots and machine tools.
ORDERING INFORMATION
Part Number
Package
64-pin plastic shrink DIP (750 mil)
64-pin plastic shrink DIP (750 mil)
Internal ROM
Mask ROM
Mask ROM
µ
PD78361ACW-×××
µ
PD78362ACW-×××
Remark
×××
indicates a ROM code suffix.
Unless otherwise specified, the
µ
PD78362A is treated as the representative model throughout this document.
The information in this document is subject to change without notice.
Document No. U10098EJ2V0DS00 (2nd edition)
Date Published August 1997 N
Printed in Japan
The mark
shows major revised points.
©
1996
µ
PD78361A, 78362A
78K/III Series Product Development
µ
PD78372 subseries
Reinforced timer,
A/D added
(for control unit of automotive appliances)
µ
PD78366A subseries
µ
PD78361A
µ
PD78362A
µ
PD78P364A
Pulse output function
for inverter control,
expanded ROM, RAM
µ
PD78363A
µ
PD78365A
µ
PD78366A
µ
PD78368A
µ
PD78P368A
(for inverter)
µ
PD78356 subseries
(for camera, HDD)
µ
PD78352A subseries
(for HDD)
A/D, D/A relative instruction
added, expanded ROM, RAM
High-performance CPU,
sum-of-products instruction added
Reinforced timer and
A/D, expanded ROM
and RAM
µ
PD78334 subseries
(for control application in OA and FA fields)
µ
PD78322 subseries
High-speed, multi-function,
reinforced interrupt,
10-bit A/D
Pulse output function
for inverter control
µ
PD78328 subseries
(for inverter)
(for control application in OA and FA fields)
µ
PD78312A subseries
(for control application in OA and FA fields)
2
µ
PD78361A, 78362A
PIN CONFIGURATION (TOP VIEW)
• 64-pin plastic shrink DIP (750 mil)
µ
PD78361ACW-×××, 78362ACW-×××
P57
P90
P91
P92
P80/TO00
P81/TO01
P82/TO02
P83/TO03
P84/TO04
P85/TO05
V
SS
P00/RTP0
P01/RTP1
P02/RTP2
P03/RTP3
V
DD
V
SS
X1
X2
RESET
P04/PWM0
P05/PWM1/TCUD
P06/TO40/TIUD
P07/TCLRUD
P30/TxD
P31/RxD
P32/SO/SB0
P33/SI/SB1
P34/SCK
MODE
P20/NMI
P21/INTP0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P56
P55
P54
P53
P52
P51
P50
P47
P46
P45
P44
P43
P42
P41
P40
V
SS
V
DD
AV
DD
AV
REF
P77/ANI7
P76/ANI6
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
AV
SS
P25/INTP4
P24/INTP3/TI
P23/INTP2
P22/INTP1
Remark
×××
indicates a ROM code suffix.
3
µ
PD78361A, 78362A
P00-P07
P20-P25
P30-P34
P40-P47
P50-P57
P70-P77
P80-P85
P90-P92
RTP0-RTP3
NMI
INTP0-INTP4
TI
TIUD
TCUD
TCLRUD
: Port0
: Port2
: Port3
: Port4
: Port5
: Port7
: Port8
: Port9
: Real-time Port
: Nonmaskable Interrupt
: Interrupt From Peripherals
: Timer Input
: Timer Input Up Down Counter
: Timer Control Up Down Counter
: Timer Clear Up Down Counter
ANI0-ANI7
T
X
D
R
X
D
SI
SO
SB0, SB1
SCK
PWM0, PWM1
MODE
RESET
X1, X2
AV
DD
AV
SS
AV
REF
V
DD
V
SS
: Analog Input
: Transmit Data
: Receive Data
: Serial Input
: Serial Output
: Serial Bus
: Serial Clock
: Pulse Width Modulation Output
: Mode
: Reset
: Crystal
: Analog V
DD
: Analog V
SS
: Analog Reference Voltage
: Power Supply
: Ground
TO00-TO05, TO40 : Timer Output
4
µ
PD78361A, 78362A
FUNCTIONAL OUTLINE
Item
Minimum instruction execution
time
Internal memory
ROM
RAM
Memory space
General-purpose registers
Number of basic instructions
Instruction set
µ
PD78361A
125 ns (internal clock: 16 MHz, external clock: 8 MHz)
µ
PD78362A
32K bytes
2K bytes
64K bytes
8 bits
×
16
×
8 banks
115
•
•
•
•
•
•
24K bytes
768 bytes
16-bit transfer/operation
Multiplication/division (16 bits
×
16 bits, 32 bits
÷
16 bits)
Bit manipulation
String
Sum-of-products operation (16 bits
×
16 bits + 32 bits)
Relative operation
I/O lines
Input
I/O
14 (of which 8 are shared with analog input)
38
• 16-bit timer
×
1
10-bit dead time timer
×
3
16-bit compare register
×
4
2 kinds of output mode can be selected
Mode 0, set-reset output: 6 channels
Mode 1, buffer output: 6 channels
• 16-bit timer
×
1
16-bit compare register
×
1
• 16-bit timer
×
1
16-bit capture register
×
1
16-bit capture/compare register
×
1
• 16-bit timer
×
1
16-bit capture register
×
2
16-bit capture/compare register
×
1
• 16-bit timer
×
1
16-bit compare register
×
2
16-bit resolution PWM output: 1 channel
Pulse outputs associated with real-time pulse unit: 4 lines
8-/9-/10-/12-bit resolution variable PWM output: 2 channels
10-bit resolution, 8 channels
Dedicated baud rate generator
UART:
1 channel
Clocked serial interface/SBI: 1 channel
• External: 6, internal: 14 (of which 2 are multiplexed with external)
• 4 priority levels can be specified through software
• 3 types of interrupt service modes selectable
(vectored interrupt, macro service, and context switching)
64-pin plastic shrink DIP (750 mil)
• Watchdog timer
• Standby function (HALT and STOP modes)
• PLL control circuit
Real-time pulse unit
Real-time output port
PWM unit
A/D converter
Serial interface
Interrupt function
Package
Others
5
FPGA/CPLD
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