DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD784031
16/8-BIT SINGLE-CHIP MICROCONTROLLER
The
µ
PD784031 is a product of the
µ
PD784038 sub-series in the 78K/IV series. It contains various peripheral
hardware such as RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interface, and interrupt
functions, as well as a high-speed, high-performance CPU.
The
µ
PD784031 is a ROM-less product of the
µ
PD784035 and
µ
PD784036.
For specific functions and other detailed information, consult the following user’s manual.
This manual is required reading for design work.
µ
PD784038, 784038Y Sub-Series User’s Manual, Hardware : U11316E
78K/IV Series User’s Manual, Instruction
: U10905E
Features
• Pin-compatible with the
µ
PD78234,
µ
PD784026, and
• Timer/counters
16-bit timer/counter
×
3 units
16-bit timer
×
1 unit
• Standby function
HALT/STOP/IDLE mode
• Clock frequency division function
• Watchdog timer: 1 channel
• A/D converter: 8-bit resolution
×
8 channels
• D/A converter: 8-bit resolution
×
2 channels
• Power supply voltage: V
DD
= 2.7 to 5.5 V
µ
PD784038Y sub-series
• Minimum instruction execution time: 125 ns
(at 32 MHz)
• Number of I/O ports: 46
• Serial interface: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, 2-wire serial I/O): 1 channel
• PWM outputs: 2
Applications
LBP, automatic-focusing camera, PPC, printer, electronic typewriter, air conditioner, electronic musical instru-
ments, cellular telephone, etc.
Ordering Information
Part number
Package
80-pin plastic QFP (14
×
14
×
2.7 mm)
80-pin plastic QFP (14
×
14
×
1.4 mm)
80-pin plastic TQFP (fine pitch) (12
×
12 mm)
Internal ROM
(bytes)
None
None
None
Internal RAM
(bytes)
2 048
2 048
2 048
µ
PD784031GC-3B9
µ
PD784031GC-8BT
µ
PD784031GK-BE9
The information in this document is subject to change without notice.
Document No. U11507EJ1V0DS00 (1st edition)
Date Published March 1997 J
Printed in Japan
The mark
shows major revised points.
©
1997
µ
PD784031
78K/IV Series Product Development Diagram
: Product under mass production
: Product under development
Standard Products Development
µ
PD784038Y sub-series
Product containing for
an I
2
C bus interface circuit
µ
PD784038 sub-series
80-pin, 8-bit A/D, 8-bit D/A
ROM: none/48K/64K/96K/128K
µ
PD784026 sub-series
80-pin, 8-bit A/D, 8-bit D/A
ROM: none/48K/64K
µ
PD784216Y sub-series
Product containing for
an I
2
C bus interface circuit
µ
PD784216 sub-series
100-pin, 8-bit A/D, 8-bit D/A
ROM: 96K/128K
µ
PD784054
80-pin, 10-bit A/D
ROM: 32K
µ
PD784046 sub-series sub-set
µ
PD784046 sub-series
80-pin, 10-bit A/D
ROM: 32K/64K
ASSP Development
µ
PD784908 sub-series
100-pin, built-in IEBus
TM
controller
ROM: 96K/128K
µ
PD784915 sub-series
VCR servo, 100-pin, built-in
analog amplifier
ROM: 48K/62K
µ
PD78F4943 sub-series
80-pin, for CD-ROM
Flash memory: 56K
2
µ
PD784031
Functions
Item
Number of basic instructions
(mnemonics)
General-purpose register
Minimum instruction execution
time
Internal
memory
Memory space
I/O ports
Total
Input
Input/output
Output
Additional
function
pins
Note
ROM
RAM
113
8 bits
×
16 registers
×
8 banks, or 16 bits
×
8 registers
×
8 banks (memory mapping)
125 ns/250 ns/500 ns/1 000 ns (at 32 MHz)
None
2 048 bytes
Program and data: 1M byte
46
8
34
4
Function
Pins with pull- 32
up resistor
LED direct
drive outputs
Transistor
direct drive
8
8
4 bits
×
2, or 8 bits
×
1
Timer/counter 0:
(16 bits)
Timer register
×
1
Capture register
×
1
Compare register
×
2
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Timer register
×
1
Compare register
×
1
Pulse output capability
•
Toggle output
•
PWM/PPG output
•
One-shot pulse output
Pulse output capability
•
Real-time output (4 bits
×
2)
Real-time output ports
Timer/counter
Timer/counter 1:
(8/16 bits)
Timer/counter 2:
(8/16 bits)
Pulse output capability
•
Toggle output
•
PWM/PPG output
Timer 3
(8/16 bits)
PWM outputs
Serial interface
A/D converter
D/A converter
Watchdog timer
Standby
Interrupt
Software source
Nonmaskable
Maskable
:
12-bit resolution
×
2 channels
UART/IOE (3-wire serial I/O)
: 2 channels (incorporating baud rate generator)
CSI (3-wire serial I/O, 2-wire serial I/O): 1 channel
8-bit resolution
×
8 channels
8-bit resolution
×
2 channels
1 channel
HALT/STOP/IDLE mode
Hardware source 23 (16 internal, 7 external (sampling clock variable input: 1))
BRK instruction, BRKCS instruction, operand error
1 internal, 1 external
15 internal, 6 external
•
4-level programmable priority
•
3 operation statuses: vectored interrupt, macro service, context switching
Supply voltage
Package
V
DD
= 2.7 to 5.5 V
80-pin plastic QFP (14
×
14
×
2.7 mm)
80-pin plastic QFP (14
×
14
×
1.4 mm)
80-pin plastic TQFP (fine pitch) (12
×
12 mm)
Note
Additional function pins are included in the I/O pins.
3
µ
PD784031
CONTENTS
1.
2.
DIFFERENCES BETWEEN
µ
PD784038 SUB-SERIES ............................................................
MAIN DIFFERENCES BETWEEN
µ
PD784038,
µ
PD784038Y,
µ
PD784026,
AND
µ
PD78234 SUB-SERIES ...................................................................................................
PIN CONFIGURATION (TOP VIEW) .........................................................................................
SYSTEM CONFIGURATION EXAMPLE (PPC) ........................................................................
BLOCK DIAGRAM ......................................................................................................................
LIST OF PIN FUNCTIONS .........................................................................................................
6.1
6.2
6.3
Port Pins ............................................................................................................................................
Non-Port Pins ...................................................................................................................................
I/O Circuits for Pins and Handling of Unused Pins ....................................................................
6
7
8
10
11
12
12
13
15
3.
4.
5.
6.
7.
CPU ARCHITECTURE ................................................................................................................
7.1
7.2
Memory Space ..................................................................................................................................
CPU Registers ..................................................................................................................................
7.2.1
7.2.2
7.2.3
General-purpose registers ................................................................................................
Control registers ................................................................................................................
Special function registers (SFRs) ....................................................................................
18
18
20
20
21
22
8.
PERIPHERAL HARDWARE FUNCTIONS ................................................................................
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
Ports ...................................................................................................................................................
Clock Generator ...............................................................................................................................
Real-Time Output Port .....................................................................................................................
Timers/Counters ...............................................................................................................................
PWM Output (PWM0, PWM1) ..........................................................................................................
A/D Converter ...................................................................................................................................
D/A Converter ...................................................................................................................................
Serial Interface .................................................................................................................................
8.8.1
8.8.2
8.9
Asynchronous serial interface/three-wire serial I/O (UART/IOE) ................................
Synchronous serial interface (CSI) ..................................................................................
27
27
28
30
31
33
34
35
36
37
39
40
40
Edge Detection Function ................................................................................................................
8.10 Watchdog Timer ...............................................................................................................................
9.
INTERRUPT FUNCTION ............................................................................................................
9.1
9.2
9.3
9.4
9.5
Interrupt Source ...............................................................................................................................
Vectored Interrupt ............................................................................................................................
Context Switching ............................................................................................................................
Macro Service ...................................................................................................................................
Examples of Macro Service Applications .....................................................................................
41
41
43
44
44
45
4
µ
PD784031
10. LOCAL BUS INTERFACE ..........................................................................................................
10.1 Memory Expansion ..........................................................................................................................
10.2 Memory Space ..................................................................................................................................
10.3 Programmable Wait .........................................................................................................................
10.4 Pseudo-Static RAM Refresh Function ..........................................................................................
10.5 Bus Hold Function ...........................................................................................................................
47
47
48
49
49
49
11. STANDBY FUNCTION ................................................................................................................
12. RESET FUNCTION .....................................................................................................................
13. INSTRUCTION SET ....................................................................................................................
14. ELECTRICAL CHARACTERISTICS ..........................................................................................
15. PACKAGE DRAWINGS..............................................................................................................
16. RECOMMENDED SOLDERING CONDITIONS .........................................................................
APPENDIX A
APPENDIX B
DEVELOPMENT TOOLS ......................................................................................
RELATED DOCUMENTS ......................................................................................
50
51
52
57
77
80
82
84
5
嵌入式系统
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