19-3089; Rev 1; 12/03
KIT
ATION
EVALU
BLE
AVAILA
High-Efficiency, Low-I
Q
PMICs with
Dynamic Core for PDAs and Smart Phones
General Description
Features
♦
Six Regulators in One Package:
Step-Down DC-DC for I/O at 1.3A
Step-Down DC-DC for Memory at 0.9A
Step-Down Serial-Programmed DC-DC for CORE
Three LDO Outputs for SRAM, PLL, and USIM
Always-On Output for VCC_BATT
♦
Low Operating Current
60µA in Sleep Mode (Sleep LDOs On)
130µA with DC-DCs On (Core Off)
200µA All Regulators On, No Load
5µA Shutdown Current
♦
Optimized for X-Scale Processors
♦
Backup-Battery Input
♦
Separate ON Controls for Any Desired Power
Sequencing
♦
1MHz PWM Switching Allows Small External
Components
♦
Tiny 6mm x 6mm, 40-Pin and 7mm x 7mm, 48-Pin
Thin QFN Packages
MAX1586A/MAX1586B/MAX1587A
The MAX1586/MAX1587 power-management ICs are
optimized for devices using Intel X-Scale™ micro-
processors, including third-generation smart cell
phones, PDAs, internet appliances, and other portable
devices requiring substantial computing and multime-
dia capability at low power.
The ICs integrate seven high-performance, low-operating-
current power supplies along with supervisory and man-
agement functions. Regulator outputs include three step-
down DC-DC outputs, three linear regulators, and a
seventh always-on output. DC-DC converter outputs
power I/O, DRAM, and the CPU core. The I/O supply can
be preset to 3.3V or 3.0V, or can be adjusted to other val-
ues. The DRAM supply on the MAX1586A and MAX1587A
is preset for 1.8V or 2.5V, while the MAX1586B DRAM
supply is preset for 3.3V or 2.5V. The DRAM supply on all
parts can also be adjusted with external resistors. The
CPU core supply is serial programmed for dynamic volt-
age management. Linear-regulated outputs are provided
for SRAM, PLL, and USIM supplies.
To minimize sleep-state quiescent current, critical
power supplies have bypass “sleep” LDOs that can be
activated to minimize battery drain when output current
is very low. Other functions include separate on/off con-
trol for all DC-DC converters, low-battery and dead-bat-
tery detection, a reset and power-OK output, a backup-
battery input, and a two-wire serial interface.
All DC-DC outputs use fast, 1MHz PWM switching and
small external components. They operate with fixed-fre-
quency PWM control and automatically switch from
PWM to skip-mode operation at light loads to reduce
operating current and extend battery life. The core out-
put is capable of operating in forced-PWM mode at all
loads to minimize ripple and noise. A 2.6V to 5.5V input
voltage range allows 1-cell lithium-ion (Li+), 3-cell
NiMH, or a regulated 5V input. The MAX1587 is avail-
able in a tiny 6mm x 6mm, 40-pin thin QFN package.
The MAX1586 features an additional linear regulator
(V6) for VCC_USIM and low-battery and dead- battery
comparators. The MAX1586 is available in a 7mm x
7mm, 48-pin thin QFN package.
Ordering Information
PART
MAX1586AETM
MAX1586BETM
MAX1587AETL
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 Thin QFN 7mm x 7mm
48 Thin QFN 7mm x 7mm
40 Thin QFN 6mm x 6mm
Simplified Functional Diagram
MAIN BATTERY
BACKUP
BATTERY
IN
MAX1586
MAX1587
V1
V2
V3
VCC_IO 3.3V
VCC_MEM 2.5V
VCC_CORE
0.8V TO 1.3V
VCC_PLL 1.3V
VCC_SRAM 1.1V
VCC_USIM
0V, 1.8V, 3.0V
VCC_BATT
BKBT
Applications
PDA, Palmtop, and Wireless Handhelds
Third-Generation Smart Cell Phones
Internet Appliances and Web-Books
Pin Configurations appear at end of data sheet.
X-Scale is a trademark of Intel Corp.
nRESET
nVCC_FAULT
nBATT_FAULT
SYS_EN
PWR_EN
MR
RSO
POK
DBO
ON1-2
ON3-6
V4
V5
V6
V7
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
High-Efficiency, Low-I
Q
PMICs with
Dynamic Core for PDAs and Smart Phones
MAX1586A/MAX1586B/MAX1587A
ABSOLUTE MAXIMUM RATINGS
IN, IN45, IN6,
MR, LBO, DBO, RSO,
POK, SCL, SDA,
BKBT, V7,
SLP,
SRAD, PWM3 to GND...............-0.3V to +6V
REF, CC_, ON_, FB_, DBI, LBI, V1, V2, RAMP, BYP,
MR
to GND ...........................................-0.3V to (V
IN
+ 0.3V)
PV1, PV2, PV3, SLPIN to IN...................................-0.3V to +0.3V
V4, V5 to GND ..........................................-0.3V to (V
IN45
+ 0.3V)
V6 to GND ..................................................-0.3V to (V
IN6
+ 0.3V)
PV1 to PG1 ............................................................-0.3V to +6.0V
PV2 to PG2 ............................................................-0.3V to +6.0V
PV3 to PG3 ............................................................-0.3V to +6.0V
LX1 Continuous Current....................................-1.30A to +1.30A
LX2 Continuous Current........................................-0.9A to +0.9A
LX3 Continuous Current........................................-0.5A to +0.5A
PG1, PG2, PG3 to GND.........................................-0.3V to +0.3V
V1, V2, V4, V5, V6 Output Short-Circuit Duration.......Continuous
Continuous Power Dissipation (T
A
= +70°C)
6mm x 6mm 40-Pin Thin QFN
(derate 26.3mW/°C above +70°C) ...........................2105mW
7mm x 7mm 48-Pin Thin QFN
(derate 26.3mW/°C above +70°C) ...........................2105mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= 3.6V, V
BKBT
= 3.0V, V
LBI
= 1.1V, V
DBI
= 1.35V, circuit of Figure 5,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values
are at T
A
= +25°C.)
PARAMETER
PV1, PV2, PV3, SLPIN, IN Supply
Voltage Range
IN45, IN6 Supply Voltage Range
IN Undervoltage-Lockout (UVLO)
Threshold
V
IN
rising
V
IN
falling
MAX1586
Only V7 on, V
IN
below
DBI threshold V
IN
= 3.0V MAX1587
No load (I
PV1
+
I
PV2
+ I
PV3
+ I
IN
+
I
SLPIN
+ I
IN45
+
I
IN6
)
REG1 and REG2 on in
switch mode, REG3 off
REG1 and REG2 on in
sleep mode, REG3 off
All REGs on
BKBT Input Current
REF Output Voltage
SYNCHRONOUS-BUCK PWM REG1
REG1 Voltage Accuracy
FB1 Voltage Accuracy
FB1 Input Current
Error-Amplifier Transconductance
Dropout Voltage (Note 1)
FB1 = GND, 3.6V
≤
V
PV1
≤
5.5V, load = 0 to 1200mA
FB1 = IN, 3.6V
≤
V
PV1
≤
5.5V, load = 0 to 1200mA
FB1 used with external resistors, 3.6V
≤
V
PV1
≤
5.5V,
load = 0 to 1200mA
FB1 used with external resistors
Referred to FB
Load = 800mA
Load = 1300mA
87
180
293
280
450
3.25
2.955
1.225
3.3
3.0
1.25
3.35
3.045
1.275
100
V
V
nA
µS
mV
ON1 = 0
ON1 = IN
0 to 10µA load
1.2375
MAX1586
MAX1587
MAX1586
MAX1587
MAX1586
MAX1587
CONDITIONS
PV1, PV2, PV3, IN, and SLPIN must connect together
externally
MIN
2.6
2.4
2.25
2.200
2.40
2.35
32
5
130
130
60
60
225
200
4
0.8
1.25
1.2625
µA
V
µA
TYP
MAX
5.5
5.5
2.55
2.525
UNITS
V
V
V
Quiescent Current
2
_______________________________________________________________________________________
High-Efficiency, Low-I
Q
PMICs with
Dynamic Core for PDAs and Smart Phones
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 3.6V, V
BKBT
= 3.0V, V
LBI
= 1.1V, V
DBI
= 1.35V, circuit of Figure 5,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values
are at T
A
= +25°C.)
PARAMETER
P-Channel On-Resistance
N-Channel On-Resistance
Current-Sense Transresistance
P-Channel Current-Limit Threshold
PWM Skip-Mode Transition Load
Current
OUT1 Maximum Output Current
LX1 Leakage Current
SYNCHRONOUS-BUCK PWM REG2
FB2 = GND, 3.6V
≤
V
PV2
≤
5.5V, load = 0 to 900mA
REG2 Voltage Accuracy
MAX1586A, MAX1587A, FB2 = IN, 3.6V
≤
V
PV2
≤
5.5V,
load = 0 to 900mA
MAX1586B, FB2 = IN, 3.6V
≤
V
PV2
≤
5.5V,
load = 0 to 900mA
FB2 Voltage Accuracy
FB2 Input Current
Error-Amplifier Transconductance
Dropout Voltage
P-Channel On-Resistance
N-Channel On-Resistance
Current-Sense Transresistance
P-Channel Current-Limit Threshold
PWM Skip-Mode Transition Load
Current
OUT2 Maximum Output Current
LX2 Leakage Current
SYNCHRONOUS-BUCK PWM REG3
REG3 from 1.3V to 1.475V, 2.6V
≤
V
PV3
_
≤
5.5V,
load = 0 to 400mA
REG3 Output Voltage Accuracy
REG3 from 0.70V to 1.275V, 2.6V
≤
V
PV3
_≤ 5.5V,
load = 0 to 500mA
-1.5
-2
68
+1.5
%
+2
µS
Decreasing load current (Note 2)
2.6V
≤
V
PV2_
≤
5.5V (Note 3)
V
PV2_
= 5.5V, LX2 = GND or PV2, V
ON2
= 0V
0.9
-10
+0.1
+10
-1.1
FB2 used with external resistors, 3.6V
≤
V
PV2
≤
5.5V,
load = 0 to 900mA
FB2 used with external resistors, V
FB2
= 1.25V
Referred to FB
Load = 900mA (Note 1)
I
LX2
= -180mA
I
LX2
= -180mA, VPV2 = 2.6V
I
LX2
= 180mA
I
LX2
= 180mA, VPV2 = 2.6V
87
243
0.225
0.26
0.15
0.17
0.75
-1.275
30
-1.50
380
0.375
0.425
0.25
0.275
2.463
1.773
3.25
1.231
2.5
1.8
3.3
1.25
2.537
1.827
3.35
1.269
100
V
nA
µS
mV
Ω
Ω
V/A
A
mA
A
µA
V
Decreasing load current (Note 2)
2.6V
≤
V
PV1
≤
5.5V (Note 3)
V
PV1
= 5.5V, LX1 = GND or PV1, V
ON1
= 0V
1.20
-20
+0.1
+20
-1.55
I
LX1
= -180mA
I
LX1
= -180mA, V
PV1
= 2.6V
I
LX1
= 180mA
I
LX1
= 180mA, V
PV1
= 2.6V
CONDITIONS
MIN
TYP
0.18
0.21
0.13
0.15
0.5
-1.80
30
-2.10
MAX
0.3
0.35
0.225
0.25
UNITS
Ω
Ω
V/A
A
mA
A
µA
MAX1586A/MAX1586B/MAX1587A
Error-Amplifier Transconductance
_______________________________________________________________________________________
3
High-Efficiency, Low-I
Q
PMICs with
Dynamic Core for PDAs and Smart Phones
MAX1586A/MAX1586B/MAX1587A
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 3.6V, V
BKBT
= 3.0V, V
LBI
= 1.1V, V
DBI
= 1.35V, circuit of Figure 5,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values
are at T
A
= +25°C.)
PARAMETER
P-Channel On-Resistance
N-Channel On-Resistance
Current-Sense Transresistance
P-Channel Current-Limit Threshold
PWM Skip-Mode Transition Load
Current
OUT3 Maximum Output Current
LX3 Leakage Current
V4, V5, V6, V1 SLEEP, V2 SLEEP
Output Current
V7 Output Current
REG4 Output Voltage
REG4 Noise
REG5 Output Voltage
IN45, IN6 Input Voltage Range
0V setting (either ON6 low or serial programmed)
REG6 Output Voltage (POR Default
to 0V, Set by Serial Input)
MAX1586
1.8V setting, load = 0.1mA to 35mA
2.5V setting, load = 0.1mA to 35mA
3.0V setting, load = 0.1mA to 35mA
V7 Output Voltage
V1 and V2 SLEEP Output Voltage
Accuracy
V1 and V2 SLEEP Dropout Voltage
V6 Dropout Voltage
V7 Switch Voltage Drop
V4, V5, V6 Output Current Limit
BKBT Leakage
OSCILLATOR
PWM Switching Frequency
SUPERVISORY/MANAGEMENT FUNCTIONS
POK Trip Threshold (Note 4)
Rising
Falling
92
88.5
94.75
90.5
97
92.5
%
0.93
1
1.07
MHz
V1 on and in regulation
V1 off
Set to same output voltage as REG1 and REG2
LOAD = 20mA
MAX1586 3V mode, load = 30mA, 2.5V mode, load = 30mA
LOAD = 20mA, V
BKBT
= V
V1
= 3.0V
40
-3.0
75
110
100
90
1
1.746
2.425
2.91
Load = 0.1 to 35mA
With 1µF C
OUT
and 0.01µF C
BYP
Load = 0.1mA to 35mA
1.067
2.4
0
1.8
2.5
3.0
V
V1
V
BKBT
+3.0
150
200
200
1.854
2.575
3.09
V
%
mV
mV
mV
mA
µA
V
Decreasing load current (Note 2)
2.6V
≤
V
PV3_
≤
5.5V (Note 3)
V
PV3_
= 5.5V, LX3 = GND or PV2, V
ON3
= 0V
0.5
-10
+0.1
+10
-0.60
I
LX3
= -180mA
I
LX2
= -180mA, V
PV3
= 2.6V
I
LX3
= 180mA
I
LX3
= 180mA, V
PV3
= 2.6V
CONDITIONS
MIN
TYP
0.225
0.26
0.15
0.17
1.25
-0.7
30
-0.85
MAX
0.375
0.425
0.25
0.275
UNITS
Ω
Ω
V/A
A
mA
A
µA
LDOS V4, V5, V6, V1 SLEEP, V2 SLEEP, AND V7 OUTPUT
35
30
1.261
1.3
15
1.1
1.133
5.5
1.339
mA
mA
V
µVRMS
V
V
4
_______________________________________________________________________________________
High-Efficiency, Low-I
Q
PMICs with
Dynamic Core for PDAs and Smart Phones
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 3.6V, V
BKBT
= 3.0V, V
LBI
= 1.1V, V
DBI
= 1.35V, circuit of Figure 5,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values
are at T
A
= +25°C.)
PARAMETER
LBI Threshold (Falling)
DBI Threshold (Falling)
RSO
Threshold (Falling)
RSO
Deassert Delay
LBI Input Bias Current
DBI Input Bias Current
Thermal-Shutdown Temperature
Thermal-Shutdown Hysteresis
LOGIC INPUTS AND OUTPUTS
LBO, DBO,
POK,
RSO,
SDA Output
Low Level
LBO, DBO,
POK,
RSO
Output Low
Level
LBO, DBO,
POK,
RSO
Output-High
Leakage Current
ON_, SCL, SDA,
SLP,
PWM3,
MR,
SRAD Input High Level
ON_, SCL, SDA,
SLP,
PWM3,
MR,
SRAD Input Low Level
ON_, SCL, SDA,
SLP,
PWM3,
MR,
SRAD Input Leakage Current
SERIAL INTERFACE
Clock Frequency
Bus-Free Time Between START and
STOP
Hold Time Repeated START Condition
CLK Low Period
CLK High Period
Setup Time Repeated START Condition
DATA Hold Time
DATA Setup Time
Maximum Pulse Width of Spikes that
Must be Suppressed by the Input
Filter of Both DATA and CLK Signals
Setup Time for STOP Condition
0.6
1.3
0.6
1.3
0.6
0.6
0
100
50
400
kHz
µs
µs
µs
µs
µs
µs
ns
ns
µs
2.6V
≤
V7
≤
5.5V, sinking 1mA
V7 = 1V, sinking 100µA
Pin = 5.5V
2.6V
≤
V
IN
≤
5.5V
2.6V
≤
V
IN
≤
5.5V
Pin = GND, 5.5V
1
1.6
0.4
1
0.4
0.4
0.2
V
V
µA
V
V
µA
MAX1586
MAX1586
T
J
rising
CONDITIONS
MAX1586 hysteresis is
5% (typ)
MAX1586 hysteresis is
5% (typ)
LBI = IN (for preset)
With resistors at LBI
DBI = IN (for preset)
With resistors at LBI
MIN
3.51
0.98
3.024
1.208
2.25
61
-50
TYP
3.6
1.00
3.15
1.232
2.41
65.5
-5
15
+160
15
50
MAX
3.69
1.02
3.276
1.256
2.56
70
UNITS
V
V
V
ms
nA
nA
°C
°C
MAX1586A/MAX1586B/MAX1587A
Voltage on REG7, hysteresis is 5% (typ)
_______________________________________________________________________________________
5
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