Micrel, Inc.
3.3V, PRECISION, 33MHz to 500MHz
PROGRAMMABLE LVPECL AND
LVDS BUS CLOCK SYNTHESIZER
Precision Edge
®
SY89534/35L
SY89534L
SY89535L
Precision Edge
®
FEATURES
s
Integrated synthesizer plus fanout buffers, clock
dividers, and translator in a single 64-pin package
s
Accepts any reference input between 14MHz to
Precision Edge
®
160MHz (single-ended or differential)
s
33MHz to 500MHz output frequency range
s
LVPECL outputs (SY89534L)
DESCRIPTION
The SY89534L and SY89535L programmable clock
synthesizers are a 3.3V, high-frequency, precision PLL-based
family optimized for multi-frequency, large clock-tree
applications that require the highest precision. These devices
integrate the following blocks into a single monolithic IC:
•
•
•
•
PLL (Phase-Lock-Loop)-based synthesizer
Fanout buffer
Clock generator (divider)
Logic translation (LVPECL, LVDS)
LVPECL and LVDS outputs (SY89535L)
s
3.3V
±
10% power supply
s
Low jitter: <50ps cycle-to-cycle
s
Low pin-to-pin skew: <50ps
s
TTL/CMOS compatible control logic
s
3 independently programmable output frequency
banks:
• 9 differential output pairs @BankB (LVPECL/LVDS)
• 2 differential output pairs @BankA (LVPECL)
• 2 differential output pairs @BankC (LVPECL)
s
Available in 64-pin EPAD-TQFP
The SY89534L and SY89535L includes a flexible input
design that accepts any reference input; single-ended LVTTL/
CMOS, SSTL and differential LVPECL, LVDS, HSTL and
CML.
This level of integration minimizes the additive jitter and
part-to-part skew associated with the discrete alternative,
resulting in superior system-level timing as well as reduced
board space and power. For applications that must interface
to a crystal oscillator, see the SY89532/33.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
APPLICATIONS
s
Servers
s
Workstations
s
Parallel processor-based systems
s
Other high-performance computing
s
Communications
PRODUCT SELECTION GUIDE
Input
Device
SY89532L*
SY89533L*
SY89534L
SY89535L
Crystal
X
X
X
X
Reference
BankA
Output
BankB
BankC
LVPECL LVPECL LVPECL
LVPECL
LVDS
LVPECL
LVPECL LVPECL LVPECL
LVPECL
LVDS
LVPECL
*Refer to SY89532/33L data sheet for details.
Precision Edge is a trademark of Micrel, Inc.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
Rev.: C
Amendment: /0
1
Issue Date: October 2005
Micrel, Inc.
Precision Edge
®
SY89534/35L
PACKAGE/ORDERING INFORMATION
NC*
GND
VCCA
VCC_LOGIC
VCC_LOGIC
OUT_SYNC
FSEL_A0
FSEL_A1
FSEL_A2
VCCOA
QA0
/QA0
QA1
/QA1
VCCOB
QB0
Ordering Information
(1)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
/QB0
QB1
/QB1
QB2
/QB2
QB3
/QB3
QB4
/QB4
QB5
/QB5
QB6
/QB6
QB7
/QB7
QB8
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
NC*
NC*
NC*
VCO_SEL
PSEL1
PSEL0
LOOP_REF
LOOP_FILTER
GND
REFCLK
/REFCLK
VBB_REF
M(3)
M(2)
M(1)
M(0)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Part Number
SY89534LHC
SY89534LHCTR
(2)
SY89535LHC
SY89535LHCTR
(2)
SY89534LHH
(3)
SY89534LHHTR
(2, 3)
SY89535LHH
(3)
SY89535LHHTR
(2, 3)
Package
Type
H64-1
H64-1
H64-1
H64-1
H64-1
H64-1
H64-1
H64-1
Operating
Range
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Package
Marking
SY89534LHC
SY89534LHC
SY89535LHC
SY89535LHC
Lead
Finish
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
64-pin
EPAD-TQFP
SY89534LHC with
NiPdAu
Pb-Free bar line indicator Pb-Free
SY89534LHC with
NiPdAu
Pb-Free bar line indicator Pb-Free
SY89535LHC with
NiPdAu
Pb-Free bar line indicator Pb-Free
SY89535LHC with
NiPdAu
Pb-Free bar line indicator Pb-Free
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64-Pin EPAD-TQFP (H64-1)
*NC: Do not connect, leave floating.
/QC1
QC1
/QC0
QC0
VCCOC
FSEL_C2
FSEL_C1
FSEL_C0
GND
FSEL_B2
FSEL_B1
FSEL_B0
GND
VCCOB
VCCOB
/QB8
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
FUNCTIONAL BLOCK DIAGRAM
FSEL_A0 (LSB)
OUT_SYNC
V
CC
_LOGIC
V
CC
_LOGIC
FSEL_A1
FSEL_A2
V
CCO
A
V
CCO
B
V
CC
A
/QA1
/QA0
GND
QA0
QA1
NC
NC
NC
NC
1
2
3
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49 QB0
48 /QB0
3
VCO_SEL
PESL1
PSEL0
LOOPREF
LOOPFILTER
GND
4
5
6
0 = Use Internal PLL
1 = Bypass Internal PLL (default)
7
8
Mux 1
9
Pre
Divider
1, 2, 4, 8
14MHz to
20MHz
47 QB1
46 /QB1
45 QB2
2x
44 /QB2
43 QB3
EN
42 /QB3
41 QB4
40 /QB4
3-Bit
Divider A
2, 4, 6, 8,
10, 12,18
5
A
Clock
Charge
Pump
VCO
(600MHz to
1000MHz)
Buf
REFCLK 10
/REFCLK
11
Phase
Detector
600MHz to
1000MHz
VBB_REF 12
V
CC
—1.3V
Reference
14MHz to 20MHz
3-Bit
Divider B
2, 4, 6, 8,
10, 12,18
9x
B
EN
3
39 QB5
38 /QB5
37 QB6
36 /QB6
M-Divide
30, 32, 34, 36, 38,
40, 42, 44, 48, 50,
52, 54, 56, 60, 62, 66
3-Bit
Divider C
2, 4, 6, 8,
10, 12,18
C
EN
(MSB) M3 13
M2 14
M1 15
(LSB) M0 16
2x
4
35 QB7
34 /QB7
33 QB8
3
32 /QB8
31 V
CCO
B
29
GND
30 V
CCO
B
17
/QC1
18
QC1
19
/QC0
20
QC0
21
V
CCO
C
22
FSEL_C2
23
FSEL_C1
24
FSEL_C0 (LSB)
25
GND
26
FSEL_B2
27
FSEL_B1
28
FSEL_B0 (LSB)
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
Precision Edge
®
SY89534/35L
PIN DESCRIPTION
Power
Pin Number
60, 61
62
55
30, 31, 50
21
4, 9, 25, 63, 29
(exposed pad)
Pin Name
V
CC_Logic
V
CCA
V
CCO
A
V
CCO
B
V
CCO
C
GND
Functional Description
Power for Core Logic: Connect to 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
Power for PLL: Connect to “quiet” 3.3V supply. 3.3V power pins are not internally
connected on the die, and must be connected together on the PCB.
Power for Output Drivers: Connect all V
CCO
pins to 3.3V supply. V
CCO
pins are not
connected internally on the die.
Ground. All GND pins must be tied together on the PCB. Exposed pad must be
soldered to a ground plane.
Configuration
Pin Number
4
Pin Name
VCO_SEL
Functional Description
LVTTL/CMOS Compatible Input: Selects between internal or external VCO. When
tied LOW (GND) internal VCO is selected. For external VCO, leave floating (default
condition is logic HIGH). Internal 25kΩ pull-up.
LVTTL/CMOS Compatible Input: Controls input frequency pre divider. Internal 25kΩ
pull-up. Default is logic HIGH. See
“Pre-Divide Frequency Select”
table.
Analog Input/Output: Provides the reference voltage for PLL loop filter.
Analog Input/Output: Provides the loop filter for PLL. See
“External Loop Filter
Considerations”
for loop filter values.
LVTTL/CMOS Compatible Input: Used to change the PLL (Phase-Lock Loop)
feedback divider. Internal 25kΩ pull-up. (M0 = LSB). Default is logic HIGH.
See
“Feedback Divide Select”
table.
LVTTL/CMOS Compatible Input: Bank C post divide select. Internal 25kΩ pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select”
table.
LVTTL/CMOS Compatible Input: Bank B post divide select. Internal 25kΩ pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select”
table.
LVTTL/CMOS Compatible Input: Bank A post divide select. Internal 25kΩ pull-up.
Default is logic HIGH. See
“Post-Divide Frequency Select.”
FSEL_A0 = LSB.
Banks A,B,C output synchronous control: (LVTTL/CMOS compatible).
Internal 25kΩ pull-up. After any bank has been programmed, toggle with a
HIGH-LOW-HIGH pulse to resynchronize all output banks.
5, 6
7
8
13,14,15,16
PSEL(1:0)
LOOP REF
LOOP FILTER
M (3:0)
22, 23, 24
26, 27, 28
56, 57, 58
59
FSEL_C (2:0)
FSEL_B (2:0)
FSEL_A (2:0)
OUT_SYNC
Input/Output
Pin Number
1, 2, 3
10, 11
12
51, 52, 53, 54
Pin Name
NC
REFCLK, /REFCLK
VBB_REF
QA1 to QA0
Functional Description
No Connect: Leave floating.
Reference Input: This flexible input accepts any input TTL/CMOS, LVPECL, LVDS,
HSTL, SSTL. See
“Input Interface”
section.
Reference Output Voltage. Used for single-ended input. Maximum sink/source
current = 0.5mA.
Bank A 100k LVPECL Output Drivers: Output frequency is controlled by FSEL_A
(0:2). Terminate outputs with 50Ω to V
CC
–2V. See
“Output Termination
Recommendations”
section for termination detail.
Bank B Output Drivers: SY89534: 100k LVPECL output drivers.
SY89535: Differential LVDS outputs. See
“Output Termination Recommendations”
section for termination detail. Output frequency is controlled by FSEL_B (0:2).
Bank C 100k LVPECL Output Drivers: Output frequency is controlled by
FSEL_C (0:2). Terminate outputs with 50Ω to V
CC
–2V. See
“Output Termination
Recommendations”
section.
No Connect: Leave floating.
3
32–49
QB8 to QB0
17, 18, 19, 20
QC1 to QC0
64
NC
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
Precision Edge
®
SY89534/35L
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
All V
CC
V
IN
I
OUT
T
LEAD
T
store
θ
JA
Rating
V
CC
Pin Potential to Ground Pin
Input Voltage
DC Output Current
Lead Temperature (soldering, 20sec.)
Storage Temperature
Package Thermal Resistance (Junction-to-Ambient)
With Die attach soldered to GND:
–Still-Air (TQFP)
–200lfpm (TQFP)
–500lfpm (TQFP)
With Die attach NOT soldered to GND:
(2)
–Still-Air (TQFP)
–200lfpm (TQFP)
–500lfpm (TQFP)
–LVPECL outputs
–LVDS outputs
Value
–0.5 to +4.0
–0.5 to V
CCI
–50
±10
260
–65 to +150
23
18
15
44
36
30
4.4
Unit
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ
JC
Package Thermal Resistance
(Junction-to-Case)
DC ELECTRICAL CHARACTERISTICS
Power Supply
T
A
= 0
°
C
Symbol
V
CCA(3)
V
CC_LOGIC
V
CCO
A/C
V
CCO
B
I
CC
Parameter
PLL and Logic Supply Voltage
Bank A and C V
CC
Output
Bank B V
CC
Output
LVPECL/LVDS
Total Supply Current
(4)
SY89534L PECL
SY89535L LVDS
Min.
3.0
3.0
3.0
—
—
Typ.
3.3
3.3
3.3
—
275
Max.
3.6
3.6
3.6
260
330
Min.
3.0
3.0
3.0
—
—
T
A
= +25
°
C
Typ.
3.3
3.3
3.3
—
285
Max.
3.6
3.6
3.6
260
330
Min.
3.0
3.0
3.0
—
—
T
A
= +85
°
C
Typ.
3.3
3.3
3.3
—
300
Max.
3.6
3.6
3.6
260
330
Unit
V
V
V
mA
mA
LVCMOS/LVTTL Input Control Logic
(All V
CC
pins = +3.3V
±10%)
T
A
= 0
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
2.0
—
—
—
Typ.
—
—
—
—
Max.
—
0.8
—
—
Min.
2.0
—
—
–300
T
A
= +25
°
C
Typ.
—
—
—
—
Max.
—
0.8
150
—
Min.
2.0
—
—
—
T
A
= +85
°
C
Typ.
—
—
—
—
Max.
—
0.8
—
—
Unit
V
V
µA
µA
NOTES:
1. permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. It is recommended that the user always solder the exposed die pad to a ground plane for enhanced heat dissipation.
3. V
CCA
, V
CC_LOGIC
, V
CCO
A/C. V
CCO
B are
not
internally connected together inside the device. They must be connected together on the PCB.
4. No load. Outputs floating, Banks A, B, and C enabled.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY89534/35L
DC ELECTRICAL CHARACTERISTICS
REFCLK (pins 10, 11) INPUT
(All V
CC
pins = +3.3V
±10%)
T
A
= 0
°
C
Symbol
V
ID
V
IH
V
IL
Parameter
Differential Input Voltage
Input HIGH Voltage
Input LOW Voltage
Min.
100
(5)
200
(6)
—
T
A
= +25
°
C
Max.
—
—
V
CC
+0.3
T
A
= +85
°
C
Min.
100
(5)
200
(6)
—
Typ.
—
—
—
Min.
100
(5)
200
(6)
—
Typ.
—
—
—
Max.
—
—
V
CC
+0.3
Typ.
—
—
—
Max.
—
—
V
CC
+0.3
Unit
mV
mV
V
V
–0.3
—
—
–0.3
—
—
–0.3
—
—
100K LVPECL Outputs
(All V
CC
pins = +3.3V
±10%)
T
A
= 0
°
C
Symbol
V
OH
V
OL
V
ID
V
IH
V
IL
I
IH
I
IL
V
BB
Parameter
Output HIGH Voltage
(7)
Output LOW Voltage
(7)
Differential Input Voltage
(8)
Input HIGH Voltage
(8)
Input LOW Voltage
(8)
Input HIGH Current
Input LOW Current
Output Reference Voltage
Min.
V
CC
–1.075
V
CC
–1.860
T
A
= +25
°
C
Max.
Min.
Typ.
—
—
T
A
= +85
°
C
Min.
Typ.
—
—
Typ.
—
—
Max.
Max.
V
CC
–0.830
V
CC
–1.570
Unit
V
V
mV
mV
V
V
µA
µA
V
V
CC
–0.830 V
CC
–1.075
V
CC
–1.570 V
CC
–1.860
V
CC
–0.830 V
CC
–1.075
V
CC
–1.570 V
CC
–1.860
100
(3)
200
(4)
—
—
—
—
—
—
V
CC
+0.3
100
(3)
200
(4)
—
—
—
—
—
—
V
CC
+0.3
100
(3)
200
(4)
—
—
—
—
—
—
V
CC
+0.3
–0.3
–600
–1200
—
—
—
—
–300
–700
–0.3
–600
–1200
—
—
—
—
–300
–700
–0.3
–600
–1200
—
—
—
—
–300
–700
V
CC
–1.26 V
CC
–1.32 V
CC
–1.38
V
CC
–1.26 V
CC
–1.32 V
CC
–1.38
V
CC
–1.26 V
CC
–1.32 V
CC
–1.38
LVDS Outputs (SY89535L) Bank B QB0:8
(9)
(All V
CC
pins = +3.3V
±10%)
T
A
= 0
°
C
Symbol
V
OD
V
OH
V
OL
V
OCM
∆V
OCM
Parameter
Output Voltage Swing
(9, 10)
Output HIGH Voltage
Output LOW Voltage
Output Common Mode Voltage
(9)
Change in Common Mode
Voltage
(9)
Min.
250
—
0.925
1.125
–50
Typ.
—
—
—
—
—
Max.
450
1.475
—
1.375
50
Min.
250
—
0.925
1.125
–50
T
A
= +25
°
C
Typ.
—
—
—
—
—
Max.
450
1.475
—
1.375
50
Min.
250
—
0.925
1.125
–50
T
A
= +85
°
C
Typ.
—
—
—
—
—
Max.
450
1.475
—
1.375
50
Unit
mV
V
V
V
mV
NOTES:
5. V
IN
< 2.4V
6. V
IN
< V
CC
+0.3V
7. 50Ω to V
CC
–2V. Banks A, B, and C enabled.
8. V
CC
= 3.0V to 3.6V.
9. 100Ω termination across differential pair.
10.
V
OD
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
5
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