DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78P014
8-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The
µ
PD78P014 is a member of the
µ
PD78014 subseries of 78K/0 series products. It uses a one-time-programmable
(OTP) ROM or EPROM instead of the mask ROM of the
µ
PD78014.
Because the
µ
PD78P014 can be programmed by users, it is ideally suited for applications involving the evaluation
of systems in development stages, small-scale production of many different products, and rapid development and time-
to-market of a new product.
Detailed information about product features and specifications can be found in the following document. Please
make sure to read this document before starting design.
µ
PD78014, 78014Y Series User’s Manual : IEU-1343
FEATURES
•
Pin compatible with mask ROM versions (except V
PP
pin)
•
Internal PROM: 32K bytes
Note
•
µ
PD78P014DW
: Reprogrammable (ideal for system evaluation)
•
µ
PD78P014CW, 78P014GC-AB8 : Programmable once only (ideal for small-scale production)
•
Internal high-speed RAM: 1024 bytes
Note
•
Buffer RAM: 32 bytes
•
Operable over same supply voltage range as mask ROM version (2.7 to 6.0 V)
•
Available for the QTOP
TM
microcomputer
Note
The internal PROM and internal high-speed RAM size can be set by means of the memory size switching
register.
Remark
The QTOP microcomputer is the general term for a single-chip microcomputer with on-chip one-time
PROM. NEC supports its program writing, marking, screening, and verification.
Differences from mask ROM versions are as follows:
•
The same memory mapping as on a mask ROM version is possible by setting the memory size
switching register.
•
There is no function for incorporating pull-up resistors by means of a mask option in P60 to P63
pins.
ORDERING INFORMATION
Part No.
Package
64-pin plastic shrink DIP (750 mil)
64-pin ceramic shrink DIP (with window) (750 mil)
64-pin plastic QFP (14
×
14 mm)
Internal ROM
One-time PROM
EPROM
One-time PROM
µ
PD78P014CW
µ
PD78P014DW
µ
PD78P014GC-AB8
In this document, the common parts of the one-time PROM version and EPROM version are represented by PROM.
The information in this document is subject to change without notice.
Document No. IC-3098C
(O. D. No. IC-8111C)
Date Published January 1995 P
Printed in Japan
The mark
5
shows revised points.
©
1992
µ
PD78P014
5
78K/0 SERIES DEVELOPMENT
µ
PD78078Y Subseries
µ
PD78064Y Subseries
µ
PD78064 Subseries
100-pin package
LCD controller/driver,
UART added
16-bit timer/event counter
function enhanced
µ
PD78078 Subseries
100-pin package
8-bit timer/event counter
added
External expansion function
enhanced
Products in Volume Production
Products under Development
Y subseries are products compatible with I C bus.
2
µ
PD78098 Subseries
µ
PD78054Y Subseries
µ
PD78054 Subseries
80-pin package
UART, D/A converter,
real-time output port added
16-bit timer/event counter
function enhanced
80-pin package
IEBus
™
controller added
µ
PD78083 Subseries
42/44-pin package
UART, A/D converter,
8-bit timer/event counter
function
µ
PD78014Y Subseries
µ
PD78014 Subseries
64-pin package
A/D converter,
16-bit timer/event counter,
SIO with automatic transmission/
reception function added
Multiply/divide instructions
added
µ
PD78018FY Subseries
µ
PD78018F Subseries
64-pin package
Capable of low voltage and
high-speed operation
µ
PD780208 Subseries
µ
PD78044A Subseries
µ
PD78024 Subseries
µ
PD78002Y Subseries
µ
PD78002 Subseries
64-pin package
64-pin package
A/D converter,
16-bit timer/event counter,
FIP
TM
controller/driver,
multiply/divide instructions
added
100-pin package
FIP controller/driver function
enhanced
µ
PD78044 Subseries
80-pin package
Automatic transmission/reception
function added
6-bit up/down counter added
FIP controller/driver function
enhanced
2
µ
PD78P014
OUTLINE OF FUNCTION
Item
Internal memory
• PROM
• RAM
Internal high-speed RAM : 1024 bytes
Note
Buffer RAM
Memory space
General registers
Instruction cycle
Main system clock
selected
Subsystem clock
selected
Instruction set
64K bytes
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
On-chip instruction execution time cycle modification function
0.4
µ
s/0.8
µ
s/1.6
µ
s/3.2
µ
s/6.4
µ
s (at 10.0 MHz operation)
122
µ
s (at 32.768 kHz operation)
• 16-bit operation
• Multiply/divide (8 bits
×
8 bits,16 bits
÷
8 bits)
• Bit manipulate (set, reset, test, Boolean operation)
• BCD correction, etc.
I/O ports
Total
• CMOS input
• CMOS I/O
A/D converter
Serial interface
Timer
• 8-bit resolution
×
8 channels
• Operable over a wide power supply voltage range: V
DD
= 2.7 to 6.0 V
• 3-wire/SBI/2-wire mode selectable
• 16-bit timer/event counter : 1 channel
• 8-bit timer/event counter
• Clock timer
• Watchdog timer
Timer output
Clock output
Buzzer output
Vectored
interrupts
Maskable
interrupts
Non-maskable
interrupt
Software
interrupt
Test input
3 (14-bit PWM output : 1)
39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz (at main system clock 10.0 MHz operation)
32.768 kHz (at subsystem clock 32.768 kHz operation)
2.4 kHz, 4.9 kHz, 9.8 kHz (at main system clock 10.0 MHz operation)
Internal : 8, External : 4
Internal : 1
Internal : 1
Internal : 1
External : 1
V
DD
= 2.7 to 6.0 V
–40 to +85
°C
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
• 64-pin ceramic shrink DIP (with window) (750 mil)
: 2 channels
: 1 channel
: 1 channel
: 1 channel
• 3-wire mode (on-chip max. 32 bytes automatic data transmit/receive function) : 1 channel
:
:
:
53
2
47
4
: 32 bytes
: 32K bytes
Note
Function
• N-channel open-drain I/O (15 V withstand voltage) :
Operating voltage range
Operating temperature
range
Package
Note
The capacity of the internal PROM and internal high-speed RAM can be set by means of the memory size
switching register.
3
µ
PD78P014
PIN CONFIGURATION (Top View)
(1) Normal operating mode
64-pin plastic shrink DIP (750 mil)
64-pin ceramic shrink DIP (with window) (750 mil)
P20/SI1
P21/SO1
P22/SCK1
P23/STB
P24/BUSY
P25/SI0/SB0
P26/SO0/SB1
P27/SCK0
P30/TO0
P31/TO1
P32/TO2
P33/TI1
P34/TI2
P35/PCL
P36/BUZ
P37
V
SS
P40/AD0
P41/AD1
P42/AD2
P43/AD3
P44/AD4
P45/AD5
P46/AD6
P47/AD7
P50/A8
P51/A9
P52/A10
P53/A11
P54/A12
P55/A13
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
64
63
62
61
60
59
58
57
56
55
54
53
52
AV
REF
AV
DD
P17/ANI7
P16/ANI6
P15/ANI5
P14/ANI4
P13/ANI3
P12/ANI2
P11/ANI1
P10/ANI0
AV
SS
P04/XT1
XT2
V
PP
X1
X2
V
DD
P03/INTP3
P02/INTP2
P01/INTP1
P00/INTP0/TI0
RESET
P67/ASTB
P66/WAIT
P65/WR
P64/RD
P63
P62
P61
P60
P57/A15
P56/A14
µ
PD78P014CW
µ
PD78P014DW
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Cautions 1. V
PP
pin should be connected to V
SS
directly.
2. AV
DD
pin should be connected to V
DD
.
3. AV
SS
pin should be connected to V
SS
.
4
µ
PD78P014
64-pin plastic QFP (14
×
14 mm)
P26/SO0/SB1
P25/SI0/SB0
P24/BUSY
P27/SCK0
P22/SCK1
P17/ANI7
P16/ANI6
P15/ANI5
P14/ANI4
P13/ANI3
P30/TO0
P31/TO1
P32/TO2
P33/TI1
P34/TI2
P35/PCL
P36/BUZ
P37
V
SS
P40/AD0
P41/AD1
P42/AD2
P43/AD3
P44/AD4
P45/AD5
P46/AD6
1
2
3
4
5
6
7
8
9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
P12/ANI2
P21/SO1
P23/STB
P20/SI1
AV
REF
AV
DD
P11/ANI1
P10/ANI0
AV
SS
P04/XT1
XT2
V
PP
X1
X2
V
DD
P03/INTP3
P02/INTP2
P01/INTP1
P00/INTP0/TI0
RESET
P67/ASTB
P66/WAIT
µ
PD78P014GC-AB8
10
11
12
13
14
15
33
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
V
SS
P56/A14
P57/A15
P60
P61
P62
P63
P64/RD
P47/AD7
P52/A10
P53/A11
P54/A12
Cautions 1. V
PP
pin should be connected to V
SS
directly.
2. AV
DD
pin should be connected to V
DD
.
3. AV
SS
pin should be connected to V
SS
.
P55/A13
P65/WR
P50/A8
P51/A9
5
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