DATA SHEET
GaAs INTEGRATED CIRCUIT
µ
PG174TA
L-BAND PA DRIVER AMPLIFIER
DESCRIPTION
The
µ
PG174TA is L-Band PA driver amplifier developed for digital cellular telephone and PCS applications. This
device feature high output power and low distortion with 2.8 V low voltage and 35 mA low current operation. It is
housed in a very small 6-pin minimold package available on tape-and-reel and easy to install and contributes to
miniaturizing the systems.
FEATURES
y
Low operation voltage : V
DD
= 2.8 V
: P
adj1
= –60 dBc TYP. @ V
DD
= 2.8 V, f
RF
= 1 429 to 1 453 MHz, P
out
= +10 dBm
y
Low distortion
Off-chip input and output matching
y
Low operation current : I
DD
= 35 mA TYP. @ V
DD
= 2.8 V, f
RF
= 1 429 to 1 453 MHz, P
out
= +10 dBm
Off-chip input and output matching
y
6-pin minimold package
APPLICATION
y
Digital Cellular: PDC1.5G, DCS1800, PCS, etc.
ORDERING INFORMATION
Part Number
Package
6-pin minimold
Qty 3kp/reel.
Supplying Form
Carrier tape width is 8 mm.
µ
PG174TA-E3
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
µ
PG174TA)
ABSOLUTE MAXIMUM RATINGS (T
A
= +25°C)
Parameters
Supply Voltage
Input Power
Total Power Dissipation
Operating Ambient Temperature
Storage Temperature
Symbol
V
DD
P
in
P
tot
T
A
T
stg
Ratings
6.0
–10
170
Note
Unit
V
dBm
mW
°C
°C
–30 to +90
–35 to +150
Note
Mounted on a 50
×
50
×
1.6 mm double copper clad epoxy glass PWB, T
A
= +85°C
Caution
The IC must be handled with care to prevent static discharge because its circuit composed of
GaAs HJ-FET.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13230EJ2V0DS00 (2nd edition)
Date Published January 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1998, 2000
µ
PG174TA
PIN CONNECTION AND INTERNAL BLOCK DIAGRAM
Pin No.
Connection
GND
GND
IN
V
DD1
GND
V
DD2
& OUT
(Top View)
3
2
1
(Bottom View)
3
4
4
5
6
4
5
6
3
2
1
2
1
5
6
1
2
3
4
5
6
RECOMMENDED OPERATING CONDITIONS (T
A
= +25°C)
Parameters
Supply Voltage 1, 2
Input Power
Symbol
V
DD1, 2
P
in
MIN.
+2.7
–
TYP.
+2.8
–22
MAX.
+3.0
–20
Unit
V
dBm
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, T
A
=
+25°C, V
DD1
= V
DD2
= +2.8 V,
π
/4DQPSK modulated signal input,
off-chip input and output matching)
Parameters
Operating Frequency
Power Gain
Total Current
Adjacent Channel Power Leakage 1
Adjacent Channel Power Leakage 2
Symbol
f
G
P
I
DD
P
adj1
P
adj2
P
in
= –22 dBm
P
in
= –22 dBm
P
out
= +10 dBm,
∆f
=
±50
kHz
P
out
= +10 dBm,
∆f
=
±100
kHz
Test Conditions
MIN.
1 429
32.0
–
–
–
TYP.
–
34.0
35
–60
–65
MAX.
1 453
–
40
–55
–60
Unit
MHz
dB
mA
dBc
dBc
REFERENCE CHARACTERISTICS
(Unless otherwise specified, T
A
=
+25°C, V
DD1
= V
DD2
= +2.8 V, f = 1 429 to 1 453 MHz,
off-chip input and output matching)
Parameters
Input Return Loss
Output Return Loss
Symbol
RL
in
RL
out
MIN.
–
–
TYP.
10
10
MAX.
–
–
Unit
dB
dB
2
G1D
Data Sheet P13230EJ2V0DS00
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
