short and medium loop length, wireless and wireline
applications. Ideally suited for remote subscriber units, this
family of products offers flexibility to designers with high
ringing voltage and low power consumption system
requirements.
The RSLIC-VoIP family operates to 100V which translates
directly to the amount of ringing voltage supplied to the end
subscriber. With the high operating voltage, subscriber loop
lengths can be extended to 500Ω (i.e., 5,000 feet) and
beyond.
Other key features across the product family include: low
power consumption, ringing using sinusoidal or trapezoidal
waveforms, robust auto-detection mechanisms for when
subscribers go on or off hook, and minimal external discrete
application components. Integrated test access features are
also offered on selected products to support loopback
testing as well as line measurement tests.
There are five product offerings of the HC55185 with each
version providing voltage grades of high battery voltage and
longitudinal balance. The voltage feed amplifier design uses
low fixed loop gains to achieve high analog performance
with low susceptibility to system induced noise.
Features
• Onboard Ringing Generation
• Compatible with Existing HC5518x Devices
• Low Standby Power Consumption (75V, 65mW)
• Reduced Idle Channel Noise
• Programmable Transient Current Limit
• Improved Off Hook Software Interface
• Integrated MTU DC Characteristics
• Low External Component Count
• Silent Polarity Reversal
• Pulse Metering and On Hook Transmission
• Tip Open Ground Start Operation
• Balanced and Unbalanced Ringing
• Thermal Shutdown with Alarm Indicator
• 28 Lead Surface Mount Packaging
• Reduced Footprint Micro Leadframe Packaging
• Dielectric Isolated (DI) High Voltage Design
• QFN Package Option
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip Scale Package Footprint; Improves PCB
efficiency and has a thinner profile
• Pb-free plus anneal available (RoHS compliant)
Block Diagram
POL
ILIM
CDC
VBL
VBH
Applications
• Voice Over Internet Protocol (VoIP)
RINGING
PORT
DC
CONTROL
BATTERY
SWITCH
• Cable Modems
VRS
• Voice Over DSL (VoDSL)
• Short Loop Access Platforms
TIP
RING
TL
2-WIRE
PORT
TRANSIENT
CURRENT
LIMIT
TRANSMIT
SENSING
4-WIRE
PORT
VRX
VTX
-IN
VFB
• Remote Subscriber Units
• Terminal Adapters
Related Literature
• AN9814, User’s Guide for Development Board
DETECTOR
LOGIC
CONTROL
LOGIC
F2
F1
F0
SW+
SW-
TEST
ACCESS
• AN9824, Modeling of the AC Loop
• Interfacing to DSP CODECs (Contact Factory)
• TB379 Thermal Characterization of Packages for ICs
• AN9922, Thermal Characterization and Modeling of the
RSLIC18 in the Micro Leadframe Package
RTD RD E0 DETALM
BSEL SWC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001-2006. All Rights Reserved. RSLIC18™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
HC55185
Ordering Information
HIGH BATTERY (VBH)
PART NUMBER
HC55185AIM*
HC55185AIMZ* (Note)
HC55185BIM*
HC55185BIMZ* (Note)
HC55185CIM*
HC55185CIMZ* (Note)
HC55185DIM*
HC55185DIMZ* (Note)
HC55185ECM*
HC55185ECMZ* (Note)
HC55185ECR*
HC55185ECRZ* (Note)
HC55185FCM*
HC55185FCMZ* (Note)
HC55185FCR*
HC55185FCRZ* (Note)
HC55185GIM
HC55185GIMZ (Note)
HC55185GCM
HC55185GCMZ (Note)
HC55185GCR*
HC55185GCRZ* (Note)
HC5518XEVAL1
PART MARKING
HC55185 AIM
HC55185 AIMZ
HC55185 BIM
HC55185 BIMZ
HC55185 CIM
HC55185 CIMZ
HC55185 DIM
HC55185 DIMZ
HC55185 ECM
HC55185 ECMZ
HC55185 ECR
HC55185 ECRZ
HC55185 FCM
HC55185 FCMZ
HC55185 FCR
HC55185 FCRZ
HC55185 GIM
HC55185 GIMZ
HC55185 GCM
HC55185 GCMZ
HC55185 GCR
HC55185 GCRZ
100V
85V
75V
LONGITUDINAL
BALANCE
58dB
53dB
FULL
TEST
TEMP.
RANGE (°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
0 to +75
0 to +75
0 to +75
0 to +75
PKG.
DWG. #
N28.45
PACKAGE
28 Ld PLCC
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
28 Ld PLCC (Pb-free) N28.45
28 Ld PLCC
N28.45
28 Ld PLCC (Pb-free) N28.45
28 Ld PLCC
N28.45
28 Ld PLCC (Pb-free) N28.45
28 Ld PLCC
N28.45
28 Ld PLCC (Pb-free) N28.45
28 Ld PLCC
N28.45
28 Ld PLCC (Pb-free) N28.45
32 Ld QFN
32 Ld QFN (Pb-free)
28 Ld PLCC
L32.7x7**
L32.7x7**
N28.45
•
•
•
•
0 to +85
0 to +85
0 to +85
0 to +85
-40 to +85
-40 to +85
28 Ld PLCC (Pb-free) N28.45
32 Ld QFN
32 Ld QFN (Pb-free)
28 Ld PLCC
L32.7x7**
L32.7x7**
N28.45
28 Ld PLCC (Pb-free) N28.45
28 Ld PLCC
N28.45
•
•
•
•
0 to +85
0 to +85
0 to +85
0 to +85
28 Ld PLCC (Pb-free) N28.45
32 Ld QFN
32 Ld QFN (Pb-free)
L32.7x7**
L32.7x7**
Evaluation board platform, including CODEC.
*Add "96" suffix for tape and reel
**Reference “Special Considerations for the QFN Package” text.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
for the PLCC package is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
2.
θ
JA
for the QFN package is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach
features including conductive thermal vias.
θ
JC
, the “case temp” is measured at the center of the exposed metal pad on the package underside.
See Tech Brief 379 and AN9922 for additional information and board layout considerations.
FPGA/CPLD
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