74LV541
Octal buffer/line driver; 3-state
Rev. 03 — 14 April 2009
Product data sheet
1. General description
The 74LV541 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC541 and 74HCT541.
The 74LV541 has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs OE1 and OE2. A HIGH on OEn causes
the outputs to assume a high-impedance OFF-state.
2. Features
I
I
I
I
I
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25
°C
Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and
T
amb
= 25
°C
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
Non-inverting outputs
Multiple package options
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
I
I
I
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LV541N
74LV541D
74LV541DB
74LV541PW
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
DIP20
SO20
SSOP20
TSSOP20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1
Type number
NXP Semiconductors
74LV541
Octal buffer/line driver; 3-state
4. Functional diagram
A0
Y0
2
18
3
A1
Y1
17
4
A2
Y2
16
5
A3
Y3
15
6
A4
Y4
14
1
19
&
EN
18
17
16
15
14
13
12
11
mna180
7
A5
Y5
13
2
3
8
A6
Y6
12
4
5
9
A7
Y7
11
6
7
OE1
1
19
OE2
mna900
8
9
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
5. Pinning information
5.1 Pinning
74LV541
OE1
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
001aaj964
74LV541
OE1
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
001aaj965
GND 10
GND 10
Fig 3.
Pin configuration DIP20, SO20
Fig 4.
Pin configuration, (T)SSOP20
74LV541_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2009
2 of 15
NXP Semiconductors
74LV541
Octal buffer/line driver; 3-state
5.2 Pin description
Table 2.
Symbol
OE1
A0 to A7
GND
Y0 to Y7
OE2
V
CC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
19
20
Description
output enable input (active LOW)
data input
ground (0 V)
output enable input (active LOW)
supply voltage
18, 17, 16, 15, 14, 13, 12, 11 data output
6. Functional description
Table 3.
Control
OE1
L
L
X
H
[1]
Functional table
[1]
Input
OE2
L
L
H
X
An
L
H
X
X
Output
Yn
L
H
Z
Z
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
=
−40 °C
to +125
°C
DIP20
SO20, SSOP20, TSSOP20
[1]
[2]
[2]
Conditions
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
Min
−0.5
-
-
-
-
−70
−65
-
-
Max
+4.6
20
50
35
70
-
+150
750
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP20 packages: above 70
°C
the value of P
tot
derates linearly with 12 mW/K.
For SO20 packages: above 70
°C
the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60
°C
the value of P
tot
derates linearly with 5.5 mW/K.
74LV541_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2009
3 of 15
NXP Semiconductors
74LV541
Octal buffer/line driver; 3-state
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
T
amb
∆t/∆V
Parameter
supply voltage
[1]
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 1.0 V to 2.0 V
V
CC
= 2.0 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
[1]
Conditions
Min
1.0
0
0
−40
-
-
-
Typ
3.3
-
-
+25
-
-
-
Max
3.6
V
CC
V
CC
+125
500
200
100
Unit
V
V
V
°C
ns/V
ns/V
ns/V
The static characteristics are guaranteed from V
CC
= 1.2 V to V
CC
= 3.6 V, but LV devices are guaranteed to function down to
V
CC
= 1.0 V (with input levels GND or V
CC
).
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
I
O
=
−100 µA;
V
CC
= 1.2 V
I
O
=
−100 µA;
V
CC
= 2.0 V
I
O
=
−100 µA;
V
CC
= 2.7 V
I
O
=
−100 µA;
V
CC
= 3.0 V
I
O
=
−8
mA; V
CC
= 3.0 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA;
V
CC
= 1.2 V
I
O
= 100
µA;
V
CC
= 2.0 V
I
O
= 100
µA;
V
CC
= 2.7 V
I
O
= 100
µA;
V
CC
= 3.0 V
I
O
= 8 mA; V
CC
= 3.0 V
I
I
I
OZ
input leakage current
OFF-state output current
V
I
= V
CC
or GND;
V
CC
= 3.6 V
V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND;
V
CC
= 3.6 V
-
-
-
-
-
-
-
0
0
0
0
0.2
-
-
-
0.2
0.2
0.2
0.40
1.0
5
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.50
1.0
10
V
V
V
V
V
µA
µA
-
1.8
2.5
2.8
2.4
1.2
2.0
2.7
3.0
2.82
-
-
-
-
-
-
1.8
2.5
2.8
2.2
-
-
-
-
-
V
V
V
V
V
−40 °C
to +85
°C
Min
0.9
1.4
2.0
-
-
-
Typ
[1]
-
-
-
-
-
-
Max
-
-
-
0.3
0.6
0.8
−40 °C
to +125
°C
Unit
Min
0.9
1.4
2.0
-
-
-
Max
-
-
-
0.3
0.6
0.8
V
V
V
V
V
V
74LV541_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2009
4 of 15
NXP Semiconductors
74LV541
Octal buffer/line driver; 3-state
Table 6.
Static characteristics
…continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
I
CC
∆I
CC
C
I
[1]
Conditions
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 3.6 V
per input; V
I
= V
CC
−
0.6 V;
V
CC
= 2.7 V to 3.6 V
−40 °C
to +85
°C
Min
Typ
[1]
-
-
3.5
Max
20
500
-
-
-
-
−40 °C
to +125
°C
Unit
Min
-
-
-
Max
160
850
-
µA
µA
pF
supply current
additional supply current
input capacitance
Typical values are measured at T
amb
= 25
°C.
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see
Figure 7.
Symbol Parameter
t
pd
propagation delay
Conditions
An to Yn; see
Figure 5
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V; C
L
= 15 pF
V
CC
= 3.0 V to 3.6 V
t
en
enable time
OEn to Yn; see
Figure 6
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
t
dis
disable time
OEn to Yn; see
Figure 6
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
[3]
[3]
[2]
[3]
[3]
[2]
[2]
−40 °C
to +85
°C
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
[1]
60
20
15
10
11
100
34
25
19
100
36
27
21
Max
-
39
29
-
23
-
65
48
38
-
66
48
39
−40 °C
to +125
°C
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
46
34
-
27
-
77
56
45
-
78
58
47
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
74LV541_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2009
5 of 15
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
