FAST CMOS
BUFFER/CLOCK DRIVER
Integrated Device Technology, Inc.
IDT49FCT805/A
IDT49FCT806/A
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 700ps (max.)
Low duty cycle distortion < 1ns (max.)
Low CMOS power levels
TTL compatible inputs and outputs
Rail-to-rail output voltage swing
High drive: -24mA I
OH
, 64mA I
OL
Two independent output banks with 3-state control
1:5 fanout per bank
‘Heartbeat’ monitor output
Available in DIP, SOIC, SSOP (805 only), QSOP (805
only), Cerpack and LCC packages
• Military product compliant to MIL-STD-883, Class B
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION:
The IDT49FCT805/A and IDT49FCT806/A are clock
drivers built using advanced dual metal CMOS technology.
The IDT49FCT805/A is a non-inverting clock driver and the
IDT49FCT806/A is an inverting clock driver. Each device
consists of two banks of drivers. Each bank drives five output
buffers from a standard TTL compatible input. The devices
feature a "heartbeat" monitor for diagnostics and PLL driving.
The MON output is identical to all other outputs and complies
with the output specifications in this document. The
IDT49FCT805/A and IDT49FCT806/A offer low capacitance
inputs with hysteresis. Rail-to-rail output swing improves
noise margin and allows easy interface with CMOS inputs.
FUNCTIONAL BLOCK DIAGRAMS
IDT49FCT805
OE
A
IDT49FCT806
OE
A
IN
A
5
OA
1
-OA
5
IN
A
5
OA
1
-OA
5
IN
B
5
OB
1
-OB
5
IN
B
5
OB
1
-OB
5
OE
B
MON
OE
B
MON
2574 drw 01
2574 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996
Integrated Device Technology, Inc.
SEPTEMBER 1996
DSC-2574/10
9.1
1
IDT49FCT805/806/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT49FCT805
V
CCA
V
CCB
OA
2
OA
1
V
CCA
OA
1
OA
2
OA
3
GND
A
OA
4
OA
5
NC
(1)
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
20
19
18
17
16
15
14
13
12
11
V
CCB
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
INDEX
3
OA
3
GND
A
OA
4
OA
5
NC
(1)
2
4
5
6
7
8
1
20 19
18
17
OB
2
OB
3
GND
B
OB
4
OB
5
L20-2
OB
1
16
15
14
9 10 11 12 13
OE
A
IN
A
IN
B
OE
B
OE
A
IN
A
OE
B
IN
B
LCC
TOP VIEW
MON
2574 drw 04
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
2574 drw 03
IDT49FCT806
V
CCA
OA
1
OA
2
OA
3
GND
A
OA
4
OA
5
NC
(1)
OE
A
IN
A
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
&
E20-1
20
19
18
17
16
15
14
13
12
11
V
CCA
V
CCB
V
CCB
OA
1
OB
1
OB
2
3
2
1
20 19
18
17
L20-2
16
15
14
OB
2
OB
3
GND
B
OB
4
OB
5
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
OA
3
GND
A
OA
4
OA
5
NC
(1)
4
5
6
7
8
9
OE
A
10 11 12 13
OE
B
MON
2574 drw 06
IN
A
LCC
TOP VIEW
DIP/SOIC/CERPACK
TOP VIEW
2574 drw 05
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
IN
A
, IN
B
OA
n
, OB
n
Description
3-State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs (FCT805)
Clock Outputs (FCT806)
Monitor Output (FCT805)
Monitor Output (FCT806
OA
n
,
OB
n
MON
MON
NOTE:
2574 tbl 01
1. Pin 8 is not internally connected on devices with a "K" prefix in the date
code. On older devices, pin 8 is internally connected to GND. To insure
compatibility with all products, pin 8 should be connected to GND at the
board level.
9.1
IN
B
OB
1
INDEX
OA
2
2
IDT49FCT805/806/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
V
TERM(2)
Terminal Voltage with Respect to
GND
V
TERM(3)
Terminal Voltage with Respect to
GND
T
STG
Storage Temperature
I
OUT
DC Output Current
Max.
–0.5 to +7.0
–0.5 to
V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4.5
5.5
Max. Unit
6.0
pF
8.0
pF
2574 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
2574 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals.
3. Output and I/O terminals.
FUNCTION TABLE
(1)
Outputs
Inputs
49FCT805
MON
L
H
L
H
L
H
L
H
L
H
Z
Z
49FCT806
OE
A
,
OE
B
L
L
H
H
IN
A
, IN
B
OA
n
, OB
n
OA
n
,
OB
n
H
L
Z
Z
MON
H
L
H
L
2574 tbl 02
NOTE:
1. H = HIGH, L = LOW, Z = High Impedance
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(5)
Input LOW Current
(5)
Off State (HIGH Z)
(5)
Output Current
(5)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC,
I
OH
= –32µA
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –300µA
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
I
OH
= -24mA MIL.
I
OH
= -24mA COM'L.
= V
LC
or V
HC,
I
OL
= 300µA
I
OH
= 300µA
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
V
H
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
I
= V
CC
V
I
=
GND
V
O
=
V
CC
V
O
=
GND
Min.
2.0
—
—
—
—
—
—
–60
V
HC
V
HC
3.6
2.4
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
3.8
GND
GND
0.3
200
5
Max.
—
0.8
±1
±1
±1
±1
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.55
—
500
Unit
V
V
µA
µA
µA
µA
V
mA
V
V
OL
Output LOW Voltage
V
CC
= 3V, V
IN
V
CC
= Min.
V
V
IN
= V
IH
or V
IL
Input Hysteresis for all inputs
Quiescent Power Supply Current
—
V
CC
= Max., V
IN
= GND or V
CC
mV
µA
2574 tbl 05
I
CC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. The test limit for this parameter is
±
5µA at T
A
= –55°C.
9.1
3
IDT49FCT805/806/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
50% Duty Cycle
V
CC
= Max.
Outputs Open
fo= 10MHz
50% Duty Cycle
OE
A
=
OE
B
=V
CC
Mon. Output Toggling
V
CC
= Max.
Outputs Open
fo = 2.5MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eleven Outputs
Toggling
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
1.0
0.15
Max.
2.5
0.20
Unit
mA
mA/
MHz/bit
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
2.5
mA
—
2.0
3.8
—
4.1
6.0
(5)
—
5.1
8.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input; (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL,
I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
2574 tbl 06
9.1
4
IDT49FCT805/806/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3,4)
IDT49FCT805/806
Com'l.
Symbol
Parameter
t
PLH
Propagation Delay
t
PHL
IN
A
to OA
n
, IN
B
to OB
n
t
R
t
F
t
SK
(o)
t
SK
(p)
t
SK
(t)
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all
banks of same package (inputs tied together)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
-t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Output Enable Time
OE
A
to OA
n
,
OE
B
to OB
n
Output Disable Time
OE
A
to OA
n
,
OE
B
to OB
n
Mil.
IDT49FCT805A/806A
Com'l.
Mil.
Unit
ns
ns
ns
ns
ns
ns
Condition
(1)
Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max.
1.5
5.6
1.5
6.3
1.5
5.3
1.5
6.0
C
L
= 50pF
R
L
= 500Ω
—
—
—
—
—
1.5
1.5
0.7
1.0
1.5
—
—
—
—
—
1.5
1.5
0.9
1.1
1.5
—
—
—
—
—
1.5
1.5
0.7
1.0
1.5
—
—
—
—
—
1.5
1.5
0.9
1.1
1.5
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5
1.5
8.0
7.0
1.5
1.5
8.5
7.5
1.5
1.5
8.0
7.0
1.5
1.5
8.5
7.5
ns
ns
2574 tbl 07
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay
limits do not imply skew.
9.1
5
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