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SY10E193JZ-TR

产品描述10E SERIES, 8-BIT ERROR DETECT AND CORRECT CKT, TRUE OUTPUT, PQCC28
产品类别逻辑    逻辑   
文件大小62KB,共5页
制造商Microchip(微芯科技)
官网地址https://www.microchip.com
下载文档 详细参数 选型对比 全文预览

SY10E193JZ-TR概述

10E SERIES, 8-BIT ERROR DETECT AND CORRECT CKT, TRUE OUTPUT, PQCC28

SY10E193JZ-TR规格参数

参数名称属性值
厂商名称Microchip(微芯科技)
包装说明LEAD FREE, PLASTIC, LCC-28
Reach Compliance Codecompliant
系列10E
JESD-30 代码S-PQCC-J28
JESD-609代码e3
长度11.48 mm
逻辑集成电路类型ERROR DETECTION AND CORRECTION CIRCUIT
位数8
功能数量1
端子数量28
最高工作温度85 °C
最低工作温度
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码QCCJ
封装形状SQUARE
封装形式CHIP CARRIER
传播延迟(tpd)1.15 ns
认证状态Not Qualified
座面最大高度4.57 mm
表面贴装YES
技术ECL
温度等级COMMERCIAL EXTENDED
端子面层MATTE TIN
端子形式J BEND
端子节距1.27 mm
端子位置QUAD
宽度11.48 mm

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Micrel, Inc.
ERROR DETECTION/
CORRECTION CIRCUIT
SY10E193
SY100E193
SY10E193
SY100E193
FEATURES
s
Hamming code generation
s
Extended 100E V
EE
range of –4.2V to –5.5V
s
8-bit wide
s
Expandable for more width
s
Provides parity register
s
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E193
s
Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E193 are error detection and correction
(EDAC) circuits designed for use in new, high- performance
ECL systems. The E193 generates hamming parity codes
on an 8-bit word as shown in the block diagram. The P
5
output gives the parity of the whole word. PGEN provides
word parity after Odd/Even parity control and gating with
the BPAR input. PGEN also feeds into a 1-bit shiftable
register for use as part of a scan ring.
The combinatorial part of the device generates the same
code pattern as the Motorola MC10193.
Used in conjunction with 12-bit parity generators, such
as the E160, a SECDED (single error correction, double
error detection) error system can be designed for a multiple
of an 8-bit word.
PIN NAMES
Pin
B
0
–B
7
BPAR
EV/OD
EN
HOLD
S-IN
SHIFT
CLK
P
1
–P
5
PGEN
PARERR/PARERR
V
CCO
Function
Check Bit Inputs
Check Bit Parity Input
Even/Odd Parity Select
Parity Enable
Syndrome Hold Input
Syndrome Bit Input
Syndrome Bit Shift
Clock Input
Parity Output
Parity Generate Output
Parity Error Output
V
CC
to Output
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
Rev.: F
Amendment: /0
1
Issue Date: March 2006

SY10E193JZ-TR相似产品对比

SY10E193JZ-TR SY10E193JZ TR SY100E193JZ TR
描述 10E SERIES, 8-BIT ERROR DETECT AND CORRECT CKT, TRUE OUTPUT, PQCC28 IC 8-bit generator 28plcc IC 8-bit generator 28plcc
Standard Package - 750 750
Category - Integrated Circuits (ICs) Integrated Circuits (ICs)
Family - Logic - Parity Generators and Checkers Logic - Parity Generators and Checkers
系列
Packaging
- Tape & Reel (TR) Tape & Reel (TR)
Logic Type - Parity Gene Parity Gene
Number of Circuits - 8-Bi 8-Bi
Voltage - Supply - 4.2 V ~ 5.5 V 4.2 V ~ 5.5 V
Operating Temperature - 0°C ~ 85°C 0°C ~ 85°C
Mounting Type - Surface Mou Surface Mou
封装 / 箱体
Package / Case
- 28-LCC (J-Lead) 28-LCC (J-Lead)
Supplier Device Package - 28-PLCC 28-PLCC
Other Names - SY10E193JZTRSY10E193JZTR-ND SY100E193JZTRSY100E193JZTR-ND

 
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