MB95260H/270H/280H Series
New 8FX 8-bit Microcontrollers
MB95260H/270H/280H are series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of these series contain a variety of peripheral resources.
Features
F
2
MC-8FX CPU core
Instruction set optimized for controllers
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Low power consumption (standby) modes
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■
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Stop mode
Sleep mode
Watch mode
Time-base timer mode
Multiplication and division instructions
16-bit arithmetic operations
Bit test branch instructions
Bit manipulation instructions, etc.
I/O port (Max: 17) (MB95F262K/F263K/F264K)
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Clock (main OSC clock and sub-OSC clock are only
available on MB95F262H/F262K/F263H/F263K/F264H
/F264K/F282H/F282K/F283H/F283K/F284H/F284K)
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General-purpose I/O ports (Max):
CMOS I/O: 15, N-ch open drain: 2
I/O port (Max: 16) (MB95F262H/F263H/F264H)
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Selectable main clock source
❐
Main OSC clock (up to 16.25 MHz, maximum machine clock
frequency: 8.125 MHz)
❐
External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
❐
Main CR clock (1/8/10 MHz
3%,
maximum machine clock
frequency: 10 MHz)
Selectable subclock source
❐
Sub-OSC clock (32.768 kHz)
❐
External clock (32.768 kHz)
❐
Sub CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz)
General-purpose I/O ports (Max):
CMOS I/O: 15, N-ch open drain: 1
I/O port (Max: 5) (MB95F272K/F273K/F274K)
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General-purpose I/O ports (Max):
CMOS I/O: 3, N-ch open drain: 2
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I/O port (Max: 4) (MB95F272H/F273H/F274H)
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General-purpose I/O ports (Max):
CMOS I/O: 3, N-ch open drain: 1
Timer
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I/O port (Max: 13) (MB95F282K/F283K/F284K)
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8/16-bit composite timer
Time-base timer
Watch prescaler
General-purpose I/O ports (Max):
CMOS I/O: 11, N-ch open drain: 2
I/O port (Max: 12) (MB95F282H/F283H/F284H)
■
LIN-UART (only available on MB95F262H/F262K
/F263H/F263K/F264H/F264K/F282H/F282K/F283H
/F283K/F284H/F284K)
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General-purpose I/O ports (Max):
CMOS I/O: 11, N-ch open drain: 1
On-chip debug
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Full duplex double buffer
Capable of clock-synchronized serial data transfer and
clock-asynchronized serial data transfer
1-wire serial control
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
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External interrupt
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Built-in hardware watchdog timer
Built-in software watchdog timer
Interrupt by edge detection (rising edge, falling edge, and both
edges can be selected)
Can be used to wake up the device from different low power
consumption (standby) modes
Power-on reset
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A power-on reset is generated when the power is switched on.
8/10-bit A/D converter
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Low-voltage detection reset circuit
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8-bit or 10-bit resolution can be selected.
Built-in low-voltage detector
Cypress Semiconductor Corporation
Document Number: 002-07516 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 4, 2016
MB95260H/270H/280H Series
Clock supervisor counter
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Dual operation Flash memory
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Built-in clock supervisor counter function
Programmable port input voltage level
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The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank)
simultaneously.
CMOS input level / hysteresis input level
Flash memory security function
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Protects the content of the Flash memory
Document Number: 002-07516 Rev. *A
Page 2 of 92
MB95260H/270H/280H Series
Contents
Product Line-up ................................................................ 4
Packages and Corresponding Products ........................ 9
Differences among Products and Note ........................... s
on Product Selection ...................................................... 10
Pin Assignment .............................................................. 11
Pin Description (MB95260H Series, 32 pins) ............... 13
Pin Description (MB95260H Series, 24 pins) ............... 15
Pin Description (MB95260H Series, 20 pins) ............... 17
Pin Description (MB95270H Series, 8 pins) ................. 19
Pin Description (MB95280H Series, 32 pins) ............... 20
Pin Description (MB95280H Series, 16 pins) ............... 22
I/O Circuit Type ............................................................... 24
Notes on Device Handling ............................................. 26
Pin Connection ............................................................... 26
Block Diagram (MB95260H Series) ............................... 28
Block Diagram (MB95270H Series) ............................... 29
Block Diagram (MB95280H Series) ............................... 30
CPU Core ......................................................................... 31
I/O Map (MB95260H Series) ........................................... 32
I/O Map (MB95270H Series) ........................................... 36
I/O Map (MB95280H Series) ........................................... 40
Interrupt Source Table (MB95260H Series) .................. 44
Interrupt Source Table (MB95270H Series) .................. 45
Interrupt Source Table (MB95280H Series) .................. 46
Electrical Characteristics ............................................... 47
Absolute Maximum Ratings ....................................... 47
Recommended Operating Conditions ....................... 49
DC Characteristics .................................................... 50
AC Characteristics ..................................................... 53
A/D Converter ............................................................ 68
Flash Memory Program/Erase Characteristics .......... 72
Sample Characteristics .................................................. 73
Mask Options .................................................................. 79
Ordering Information ...................................................... 80
Package Dimension ........................................................ 82
Major Changes ................................................................ 90
Document History ........................................................... 91
Document Number: 002-07516 Rev. *A
Page 3 of 92
MB95260H/270H/280H Series
1. Product Line-up
MB95260H Series
Part number
MB95F262H
Parameter
Type
Clock supervisor
counter
Flash memory
capacity
RAM capacity
Power-on reset
Low-voltage
detection reset
Reset input
MB95F263H
MB95F264H
MB95F262K
MB95F263K
MB95F264K
Flash memory product
It supervises the main clock oscillation.
8 Kbyte
240 bytes
12 Kbyte
496 bytes
No
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•
•
•
•
•
•
•
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Dedicated
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
I/O ports (Max) : 16
CMOS I/O
: 15
N-ch open drain : 1
20 Kbyte
496 bytes
Yes
Yes
Selected by software
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (machine clock frequency = 16.25 MHz)
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 17
• CMOS I/O
: 15
• N-ch open drain : 2
8 Kbyte
240 bytes
12 Kbyte
496 bytes
20 Kbyte
496 bytes
CPU functions
General-purpose
I/O
Time-base timer
Hardware/software
watchdog timer
Wild register
LIN-UART
8/10-bit A/D
converter
8/16-bit
composite timer
Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
• Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
• The sub CR clock can be used as the source clock of the hardware watchdog timer.
It can be used to replace three bytes of data.
• A wide range of communication speed can be selected by a dedicated reload timer.
• It has a full duplex double buffer.
• Clock-synchronized serial data transfer and clock-asynchronized serial data transfer is enabled.
• The LIN function can be used as a LIN master or a LIN slave.
6 channels
8-bit or 10-bit resolution can be selected.
2 channels
• The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel".
• It has built-in timer function, PWC function, PWM function and input capture function.
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
6 channels
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
• It can be used to wake up the device from the standby mode.
• 1-wire serial control
• It supports serial writing. (asynchronous mode)
External
interrupt
On-chip debug
(Continued)
Document Number: 002-07516 Rev. *A
Page 4 of 92
MB95260H/270H/280H Series
(Continued)
Part number
MB95F262H
Parameter
Watch prescaler
MB95F263H
MB95F264H
MB95F262K
MB95F263K
MB95F264K
Flash memory
Standby mode
Package
Eight different time intervals can be selected.
• It supports automatic programming, Embedded Algorithm, program/erase/erase-suspend/erase-resume com-
mands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
• Number of program/erase cycles: 100000
• Data retention time: 20 years
• Flash security feature for protecting the content of the Flash memory
Sleep mode, stop mode, watch mode, time-base timer mode
DIP-24P-M07
LCC-32P-M19
FPT-20P-M09
FPT-20P-M10
Document Number: 002-07516 Rev. *A
Page 5 of 92
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