BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Rev. 03 — 26 January 2009
Product data sheet
1. Product profile
1.1 General description
Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using advanced TrenchMOS technology. This product has been designed
and qualified to the appropriate AEC standard for use in high performance automotive
applications.
1.2 Features and benefits
AEC Q101 compliant
Avalanche robust
Suitable for standard level gate drive
Suitable for thermally demanding
environment up to 175°C rating
1.3 Applications
12V Motor, lamp and solenoid loads
High performance automotive power
systems
High performance Pulse Width
Modulation (PWM) applications
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
Quick reference
Conditions
V
GS
= 10 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3;
T
mb
= 25 °C; see
Figure 2
[1]
[2]
Min
-
-
-
Typ
-
-
-
Max
40
100
333
Unit
V
A
W
drain-source voltage T
j
≥
25 °C; T
j
≤
175 °C
drain current
total power
dissipation
drain-source
on-state resistance
Symbol Parameter
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 12;
see
Figure 13
I
D
= 100 A; V
sup
≤
40 V;
R
GS
= 50
Ω;
V
GS
= 10 V;
T
j(init)
= 25 °C; unclamped
-
1.96
2.3
mΩ
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source
avalanche energy
[1]
[2]
-
-
1.2
J
Refer to document 9397 750 12572 for further information.
Continuous current is limited by package.
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol
G
D
S
D
Description
gate
drain
source
mounting base; connected to
drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
1 2 3
SOT226
(TO-220AB; I2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
BUK7E2R3-40C
TO-220AB;
plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB
I2PAK
Version
SOT226
BUK7E2R3-40C_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 26 January 2009
2 of 14
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1;
see
Figure 3;
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1;
see
Figure 3;
T
mb
= 100 °C; V
GS
= 10 V; see
Figure 1;
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
mb
= 25 °C;
T
mb
= 25 °C;
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
Avalanche ruggedness
non-repetitive
I
D
= 100 A; V
sup
≤
40 V; R
GS
= 50
Ω;
V
GS
= 10 V;
drain-source avalanche T
j(init)
= 25 °C; unclamped
energy
repetitive drain-source
avalanche energy
[1]
[2]
[3]
[4]
[5]
[6]
[7]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
[1][2]
[1][3]
[1][2]
Min
-
-
-20
-
-
-
-
-
-55
-55
[1][3]
[1][2]
-
-
-
-
Max
40
40
20
100
276
100
1104
333
175
175
276
100
1104
1.2
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
J
T
mb
= 25 °C; t
p
≤
10 µs; pulsed; see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
E
DS(AL)R
see
Figure 4;
[4][5]
[6][7]
-
-
J
Refer to document 9397 750 12572 for further information.
Continuous current is limited by package.
Current is limited by power dissipation chip rating.
Maximum value not quoted. Repetitive rating defined in avalanche rating figure.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Repetitive avalanche rating limited by an average junction temperature of 170 °C.
Refer to application note AN10273 for further information.
BUK7E2R3-40C_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 26 January 2009
3 of 14
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
300
I
D
(A)
200
003aab004
120
P
der
(%)
80
03aa16
100
(1)
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aab028
10
4
I
D
(A)
10
3
limit R
DSon
= V
DS
/I
D
δ
= 10
μs
100
μs
(1)
10
2
DC
10
1 ms
1
10 ms
100 ms
10
−1
10
−1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK7E2R3-40C_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 26 January 2009
4 of 14
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
10
3
I
AL
(A)
10
2
(1)
003aab013
(2)
10
(3)
1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig 4.
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
BUK7E2R3-40C_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 26 January 2009
5 of 14
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