VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC7124
Features
• ANSI X3T11 Fibre Channel Compliant at 1.0625Gb/s
• IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s
• Five Port Bypass Circuits (PBCs)
• On-Chip Transmit Termination
Quad Port Bypass Circuit
• 3.3V, 0.25W Typical Power
• 0.35um CMOS, a Velocity Family Member
• 44-Pin, 10mm PQFP Package
General Description
The VSC7124 contains five cascaded Port Bypass Circuits (PBCs) used to steer serial signals. This part is typ-
ically used in distributing Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Fig-
ure 1. The VSC7124 can be used with any of the Vitesse JBOD circuits to implement FC-AL JBODs of
virtually any size. In Figure 1, the first VSC7127’s CRU is configured as a Repeater to attenuate jitter. The
VSC7124 does not contain a CRU in order to reduce power and cost. The second VSC7127’s CRU is config-
ured as a retimer so that the output of the device is a jitter compliance point.
Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the exter-
nal input or, if LOW, selects the output of the previous PBC.
VSC7124 Block Diagram
O1+
O1-
I1+
I1-
SEL1
O2+
O2-
I2+
I2-
SEL2
O3+
O3-
I3+
I3-
SEL3
O4+
O4-
I4+
I4-
SEL4
O0+
O0-
I0+
I0-
SEL0
1
0
1
0
1
0
1
0
1
0
PBC1
PBC2
PBC3
PBC4
PBC0
G52293-0, Rev 2.3
05/07/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
Quad Port Bypass Circuit
VSC7124
Application Example
A 12-port JBOD is shown in Figure 1. This dual loop application uses one VSC7127R, one VSC7127T and one
VSC7124 on each loop in order to configure the FC-AL disk array. Functional drives are included in the FC-
AL loop while nonfunctional or missing drives (numbers 2, 7, 9) are excluded.
Figure 1: 12-Drive FC-AL JBOD Application
Optics
or
Copper
1
LOOP A
Retimer
0
1
Retimer
0
1
0
VSC7127T #6
7125
SerDes
7125
SerDes
1
VSC7127T #5
0
1
2
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
0
1
4
VSC7121 QUAD PORT BYPASS CIRCUIT
0
1
3
4
0
1
3
0
1
CONFIGURATION:
VSC7127R #1 & 2: Repeater Mode
SEL0=1, SEL5=1
MODE=0
VSC7124 #3 & 4: No CRU
VSC7127T #5 & 6: Retimer Mode
SEL1=1, SEL5=1
MODE=1
0
1
1
0
2
0
4
1
5
6
0
1
VSC7124 #4
0
1
VSC7124 #3
0
1
3
0
1
7
7125
SerDes
7125
SerDes
0
1
2
0
1
8
0
1
0
0
1
0
1
9
0
1
4
0
1
VSC7127R #2
0
1
3
VSC7127R #1
0
1
0
1
2
0
1
Optics
or
Copper
0
1
1
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
7125
SerDes
10
11
12
LOOP B
Repeater
0
Repeater
Page 2
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52293-0, Rev 2.3
5/7/01
VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC7124
Figure 2: Timing Waveforms
Quad Port Bypass Circuit
Ix+/-
Ox+/-
T
1
T
1
AC Characteristics
Parameters
T
1
T
R
, T
F
T
j(PBC)
(Over Recommended Operating Conditions)
Description
Propagation Delay
Serial Data Rise and Fall Time
Data Jitter Accummulation
Min
Typ
Max
7.0
300
120
Units
ns
ps
ps
Conditions
Delay with all circuits
bypassed.
At
∆V
IN
minimum levels
Peak-to-Peak on Ox+/-
DC Characteristics
(Over Recommended Operating Conditions)
Parameters
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
∆V
OUT75(1)
∆V
OUT50(1)
∆V
IN(1)
V
DD
P
D
I
DD
Description
Output HIGH voltage (TTL)
Output LOW voltage (TTL)
Input HIGH voltage (TTL)
Input LOW voltage (TTL)
Input HIGH current (TTL)
Input LOW current (TTL)
TX output differential peak-to-peak
voltage swing
TX output differential peak-to-peak
voltage swing
Receiver differential peak-to-peak
Input Sensitivity RX
Supply voltage
Power dissipation
Power Supply Current
Min
2.4
Typ
Max
0.5
Units
V
V
V
V
µA
µA
mVp-p
mVp-p
mVp-p
V
mW
mA
Conditions
I
OH
= -1.0 mA
I
OL
= +1.0 mA
2.0
0
50
5.5
0.8
500
-500
V
IN
=2.4V
V
IN
=0.5V
75Ω to V
DD
– 2.0 V
50Ω to V
DD
– 2.0 V
Internally biased to V
DD
/2
3.3V±5%
Outputs open,
V
DD
= V
DD
max ±2%
Outputs open,
V
DD
= V
DD
max
1200
1000
400
3.14
250
76
2200
2200
2600
3.47
555
160
NOTE: (1) Refer to Application Note AN-37 for details regarding differential voltage measurements.
G52293-0, Rev 2.3
05/07/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 3
VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
Quad Port Bypass Circuit
VSC7124
Absolute Maximum Ratings
(1)
TTL Power Supply Voltage (V
DD
)...................................................................................................... 0.5V to +4V
PECL DC Input Voltage (V
INP
) ............................................................................................. -0.5V to V
DD
+0.5V
TTL DC Input Voltage, (V
INT
).......................................................................................................... -0.5V to 5.5V
DC Voltage Applied to Outputs for High Output State (V
IN TTL
) ........................................ -0.5V to V
DD
+ 0.5V
TTL Output Current (I
OUT
), (DC, Output High)........................................................................................... 50mA
PECL Output Current (I
OUT
), (DC, Output High) ....................................................................................... -50mA
Case Temperature Under Bias, (T
C
)............................................................................................. -55
°
C to +125
°
C
Storage Temperature (T
STG
)........................................................................................................ -65
°
C to + 150
°
C
Recommended Operating Conditions
(2)
Power Supply Voltage (V
DD
) . ......................................................................................................+3.14V to 3.47V
Ambient Operating Temperature Range (T)....................................................................... 0
°
C to +85
°
C Ambient
NOTES: (1) CAUTION: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without caus-
ing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended
periods may affect device reliability.
(2) Vitesse guarantees the functional and parametric operation of the part under “Recommended Operating Conditions”
except where specifically noted in the AC and DC Parametric tables.
Page 4
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52293-0, Rev 2.3
5/7/01
VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC7124
Package Pin Descriptions
Figure 3: Pin Diagram
VDDP2
VDDP3
O2+
VSS
O3+
O2-
I2+
O3-
I3+
I2-
I3-
Quad Port Bypass Circuit
43
VSS
VDD
I1-
I1+
VDDP1
O1-
O1+
VSS
I0-
I0+
VSS
11
13
9
7
5
3
1
41
39
37
35
33
VSS
VDD
31
O4+
O4-
29
VDDP4
I4+
VSC7124
27
I4-
VDDP0
25
O0-
O0+
23
15
17
19
21
N/C
SEL1
SEL2
SEL0
SEL3
SEL4
VSS
N/C
VDD
N/C
Table 1: Pin Identifications
Pin #
4, 3, 41, 40
35, 34, 28, 27
10, 9
15, 16,
17, 18
14
7, 6, 44, 43
38, 37, 31, 30
24, 25
2, 21, 32
5
42
36
29
26
12, 13, 20, 22, 23
1, 8, 11, 19, 33, 39
Name
I1+, I1-, I2+, I2-
I3+, I3-, I4+, I4-
I0+, I 0-
SEL1, SEL2
SEL3, SEL4
SEL0
O1+, O1-, O2+, O2-
O3+, O3-, O4+, O4-
O0+, O0-
VDD
VDDP1
VDDP2
VDDP3
VDDP4
VDDP0
N/C
VSS
N/C
N/C
Description
INPUT - Differential, Internally Biased to V
DD
/2
Ix+/Ix- is the serial input to PBCx.
INPUT - TTL
Port Bypass Mux SELect lines. A HIGH selects Ix. A LOW selects the
output of the previous internal device.
OUTPUT - Differential
Ox+/Ox- is the serial output from PBCx.
Digital Logic Power Supply.
Power Supply (3.3V) for O1+/-.
Power Supply (3.3V) for O2+/-.
Power Supply (3.3V) for O3+/-.
Power Supply (3.3V) for O4+/-.
Power Supply (3.3V) for O0+/-.
Not Connected
Ground
If unused, connect to VSS.
If unused, connect to VSS.
If unused, connect to VSS.
If unused, connect to VSS.
If unused, connect to VSS
G52293-0, Rev 2.3
05/07/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 5
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